Searched refs:PLL_RDY (Results 1 – 3 of 3) sorted by relevance
71 #define PLL_RDY BIT(0) macro233 value, value & PLL_RDY, 100, 1000); in rockchip_edp_phy_set_rate()336 return FIELD_GET(PLL_RDY, val); in rockchip_edp_phy_enabled()
66 #define PLL_RDY BIT(0) macro228 value, value & PLL_RDY, 100, 1000); in rockchip_edp_phy_set_rate()
739 #define PLL_RDY BIT(1) macro781 bit_status = !(readl_relaxed(clk_elem->reg) & PLL_RDY); in pll_enable()