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Searched refs:PLL_INT (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/kernel/sound/pci/ctxfi/
H A Dcthardware.h202 #define PLL_INT (1 << 10) /* PLL input-clock out-of-range */ macro
/OK3568_Linux_fs/kernel/drivers/net/ieee802154/
H A Dmcr20a.c79 static const u8 PLL_INT[16] = { variable
501 ret = regmap_write(lp->regmap_dar, DAR_PLL_INT0, PLL_INT[channel - 11]); in mcr20a_set_channel()