Searched refs:PLL_DIVISORS (Results 1 – 7 of 7) sorted by relevance
| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3368.c | 106 #define PLL_DIVISORS(hz, _nr, _no) { \ macro 113 static const struct pll_div apll_l_init_cfg = PLL_DIVISORS(APLL_L_HZ, 12, 2); 114 static const struct pll_div apll_b_init_cfg = PLL_DIVISORS(APLL_B_HZ, 1, 2); 116 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 2); 117 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 6); 424 static const struct pll_div dpll_1200 = PLL_DIVISORS(1200 * MHz, 1, 1); in rk3368_ddr_set_clk() 425 static const struct pll_div dpll_1332 = PLL_DIVISORS(1332 * MHz, 2, 1); in rk3368_ddr_set_clk() 426 static const struct pll_div dpll_1600 = PLL_DIVISORS(1600 * MHz, 3, 2); in rk3368_ddr_set_clk()
|
| H A D | clk_rk3399.c | 48 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ macro 54 static const struct pll_div ppll_init_cfg = PLL_DIVISORS(PPLL_HZ, 2, 2, 1); 56 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 3, 1); 57 static const struct pll_div npll_init_cfg = PLL_DIVISORS(NPLL_HZ, 1, 3, 1); 58 static const struct pll_div apll_1600_cfg = PLL_DIVISORS(1600*MHz, 3, 1, 1); 59 static const struct pll_div apll_816_cfg = PLL_DIVISORS(816 * MHz, 1, 2, 1); 60 static const struct pll_div apll_600_cfg = PLL_DIVISORS(600*MHz, 1, 2, 1);
|
| H A D | clk_rk3066.c | 95 #define PLL_DIVISORS(hz, _nr, _no) {\ macro 103 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2); 104 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
|
| H A D | clk_rk3188.c | 93 #define PLL_DIVISORS(hz, _nr, _no) {\ macro 101 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2); 102 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
|
| H A D | clk_rk3036.c | 49 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ macro 59 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1); 60 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
|
| H A D | clk_rv1108.c | 31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ macro 40 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1); 41 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
|
| H A D | clk_rk3288.c | 212 #define PLL_DIVISORS(hz, _nr, _no) {\ macro 219 static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1); 220 static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 1, 4); 221 static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
|