Searched refs:NVBL_PLLP_KHZ (Results 1 – 4 of 4) sorted by relevance
14 #define NVBL_PLLP_KHZ 216000 macro18 #define NVBL_PLLP_KHZ 408000 macro
393 src = CLK_DIVIDER(NVBL_PLLP_KHZ, CSITE_KHZ); in clock_enable_coresight()
167 CLK_DIVIDER(NVBL_PLLP_KHZ, 102000)); in tegra124_init_clocks()
159 CLK_DIVIDER(NVBL_PLLP_KHZ, 102000)); in t114_init_clocks()