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Searched refs:NDCR (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/
H A Dmarvell_nand.c123 #define NDCR 0x00 macro
513 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_disable_int()
514 writel_relaxed(reg | int_mask, nfc->regs + NDCR); in marvell_nfc_disable_int()
522 reg = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_enable_int()
523 writel_relaxed(reg & ~int_mask, nfc->regs + NDCR); in marvell_nfc_enable_int()
551 ndcr = readl_relaxed(nfc->regs + NDCR); in marvell_nfc_force_byte_access()
558 writel_relaxed(ndcr, nfc->regs + NDCR); in marvell_nfc_force_byte_access()
571 ret = readl_relaxed_poll_timeout(nfc->regs + NDCR, val, in marvell_nfc_wait_ndrun()
576 writel_relaxed(readl(nfc->regs + NDCR) & ~NDCR_ND_RUN, in marvell_nfc_wait_ndrun()
577 nfc->regs + NDCR); in marvell_nfc_wait_ndrun()
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/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/
H A Dpxa3xx.c50 #define NDCR (*(volatile u32 __iomem*)(NAND_VIRT + 0)) macro
481 NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL; in pxa3xx_init()
/OK3568_Linux_fs/u-boot/drivers/mtd/nand/raw/
H A Dpxa3xx_nand.c40 #define NDCR (0x00) /* Control register */ macro
570 nand_writel(info, NDCR, 0); in pxa3xx_nand_start()
571 nand_writel(info, NDCR, ndcr); in pxa3xx_nand_start()
578 ndcr = nand_readl(info, NDCR); in disable_int()
579 nand_writel(info, NDCR, ndcr | int_mask); in disable_int()
1468 uint32_t ndcr = nand_readl(info, NDCR); in pxa3xx_nand_detect_config()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2334 #define NDCR 0x43100000 /* Data Flash Control register */ macro