Searched refs:MVPP22_XLG_CTRL0_REG (Results 1 – 3 of 3) sorted by relevance
1440 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()1443 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_enable()1458 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()1460 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_disable()1821 val = readl(port->base + MVPP22_XLG_CTRL0_REG) & in mvpp2_mac_reset_assert()1823 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_mac_reset_assert()5536 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()5539 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_port_init()5758 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in mvpp2_xlg_pcs_get_state()5979 mvpp2_modify(port->base + MVPP22_XLG_CTRL0_REG, in mvpp2_xlg_config()[all …]
475 #define MVPP22_XLG_CTRL0_REG 0x100 macro
410 #define MVPP22_XLG_CTRL0_REG 0x100 macro3290 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_mode_cfg()3292 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_mode_cfg()3344 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_reset()3349 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_reset()3435 val = readl(port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_port_enable()3444 writel(val, port->base + MVPP22_XLG_CTRL0_REG); in gop_xlg_mac_port_enable()