Searched refs:MT8192_CORE0_SW_RSTN_CLR (Results 1 – 2 of 2) sorted by relevance
48 #define MT8192_CORE0_SW_RSTN_CLR 0x10000 macro
163 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); in mt8192_scp_reset_deassert()