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Searched refs:MPLL_CON1_VAL (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos4.c86 writel(MPLL_CON1_VAL, &clk->mpll_con1); in system_clock_init()
H A Dexynos5_setup.h447 #define MPLL_CON1_VAL (0x00203800) macro
712 #define MPLL_CON1_VAL (0x0020F300) macro
H A Dexynos4_setup.h366 #define MPLL_CON1_VAL ((MPLL_AFC_ENB << 31) | (MPLL_AFC << 0)) macro
H A Dclock_init_exynos5.c629 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5250_system_clock_init()
850 writel(MPLL_CON1_VAL, &clk->mpll_con1); in exynos5420_system_clock_init()
/OK3568_Linux_fs/u-boot/board/samsung/trats/
H A Dtrats.c344 writel(MPLL_CON1_VAL, (unsigned int)&clk->mpll_con1); in board_clock_init()
H A Dsetup.h255 #define MPLL_CON1_VAL ((MPLL_AFC_ENB << 31) | (MPLL_AFC << 0)) macro