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Searched refs:JZ4725B_CLK_PLL_HALF (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/ingenic/
H A Djz4725b-cgu.c79 [JZ4725B_CLK_PLL_HALF] = {
136 .parents = { JZ4725B_CLK_PLL_HALF, -1, -1, -1 },
143 .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 },
158 .parents = { JZ4725B_CLK_PLL_HALF, -1, -1, -1 },
164 .parents = { JZ4725B_CLK_EXT, JZ4725B_CLK_PLL_HALF, -1, -1 },
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Djz4725b-cgu.h12 #define JZ4725B_CLK_PLL_HALF 3 macro
/OK3568_Linux_fs/kernel/arch/mips/boot/dts/ingenic/
H A Djz4725b.dtsi204 <&cgu JZ4725B_CLK_PLL_HALF>;