Searched refs:ISP32_MI_WR_CTRL2_SHD (Results 1 – 3 of 3) sorted by relevance
448 u32 reg = ISP32_MI_WR_CTRL2_SHD; in bp_is_stream_stopped()465 u32 reg = ISP32_MI_WR_CTRL2_SHD; in bpds_is_stream_stopped()482 u32 reg = ISP32_MI_WR_CTRL2_SHD; in mpds_is_stream_stopped()
568 #define ISP32_MI_WR_CTRL2_SHD (ISP3X_MI_BASE + 0x00410) macro
802 rkisp_read(dev, ISP32_MI_WR_CTRL2_SHD, true) & ISP32_BP_EN_OUT_SHD)) in rkisp_trigger_read_back()