Searched refs:ISP32_MI_MPDS_WR_CTRL (Results 1 – 4 of 4) sorted by relevance
95 ISP32_BP_RESIZE_BASE, ISP3X_MI_BP_WR_CTRL, ISP32_MI_MPDS_WR_CTRL, in default_sw_reg_flag()698 writel(ISP32_DS_DS_DIS, dev->base_addr + ISP32_MI_MPDS_WR_CTRL); in rkisp_soft_reset()
432 .ctrl = ISP32_MI_MPDS_WR_CTRL,488 reg = ISP32_MI_MPDS_WR_CTRL; in mpds_is_stream_stopped()
557 rkisp_update_regs(dev, ISP32_MI_MPDS_WR_CTRL, ISP32_MI_MPDS_WR_CTRL); in rkisp_multi_overflow_hdl()581 writel(0, hw->base_addr + ISP32_MI_MPDS_WR_CTRL); in rkisp_multi_overflow_hdl()
526 #define ISP32_MI_MPDS_WR_CTRL (ISP3X_MI_BASE + 0x002a0) macro