Searched refs:HI6220_PLL_DDR_GATE (Results 1 – 3 of 3) sorted by relevance
164 #define HI6220_PLL_DDR_GATE 3 macro
165 #define HI6220_PLL_DDR_GATE 3 macro
261 …{ HI6220_PLL_DDR_GATE, "pll_ddr_gate", "ddrpll0", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x1…