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Searched refs:GPU_CONTROL_REG (Results 1 – 25 of 48) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A Dmali_kbase_gpuprops_backend.c39 registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID)); in kbase_backend_gpuprops_get()
42 GPU_CONTROL_REG(L2_FEATURES)); in kbase_backend_gpuprops_get()
45 GPU_CONTROL_REG(TILER_FEATURES)); in kbase_backend_gpuprops_get()
47 GPU_CONTROL_REG(MEM_FEATURES)); in kbase_backend_gpuprops_get()
49 GPU_CONTROL_REG(MMU_FEATURES)); in kbase_backend_gpuprops_get()
51 GPU_CONTROL_REG(AS_PRESENT)); in kbase_backend_gpuprops_get()
54 GPU_CONTROL_REG(JS_PRESENT)); in kbase_backend_gpuprops_get()
62 GPU_CONTROL_REG(JS_FEATURES_REG(i))); in kbase_backend_gpuprops_get()
69 GPU_CONTROL_REG(TEXTURE_FEATURES_REG(i))); in kbase_backend_gpuprops_get()
72 GPU_CONTROL_REG(THREAD_MAX_THREADS)); in kbase_backend_gpuprops_get()
[all …]
H A Dmali_kbase_model_dummy.c452 case GPU_CONTROL_REG(SHADER_PRESENT_LO): in get_implementation_register()
454 case GPU_CONTROL_REG(TILER_PRESENT_LO): in get_implementation_register()
456 case GPU_CONTROL_REG(L2_PRESENT_LO): in get_implementation_register()
458 case GPU_CONTROL_REG(STACK_PRESENT_LO): in get_implementation_register()
461 case GPU_CONTROL_REG(SHADER_PRESENT_HI): in get_implementation_register()
462 case GPU_CONTROL_REG(TILER_PRESENT_HI): in get_implementation_register()
463 case GPU_CONTROL_REG(L2_PRESENT_HI): in get_implementation_register()
464 case GPU_CONTROL_REG(STACK_PRESENT_HI): in get_implementation_register()
1105 GPU_CONTROL_REG(L2_PRESENT_LO), dummy->control_reg_values); in midgard_model_create()
1107 GPU_CONTROL_REG(SHADER_PRESENT_LO), dummy->control_reg_values); in midgard_model_create()
[all …]
H A Dmali_kbase_instr_backend.c37 const u32 prfcnt_active = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)) & in wait_prfcnt_ready()
77 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_instr_hwcnt_enable_internal()
78 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), irq_mask | in kbase_instr_hwcnt_enable_internal()
103 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_CONFIG), in kbase_instr_hwcnt_enable_internal()
111 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_LO), in kbase_instr_hwcnt_enable_internal()
113 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_enable_internal()
116 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_JM_EN), in kbase_instr_hwcnt_enable_internal()
119 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_SHADER_EN), in kbase_instr_hwcnt_enable_internal()
121 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_MMU_L2_EN), in kbase_instr_hwcnt_enable_internal()
124 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_TILER_EN), in kbase_instr_hwcnt_enable_internal()
[all …]
H A Dmali_kbase_pm_driver.c281 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), in mali_cci_flush_l2()
285 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
292 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)); in mali_cci_flush_l2()
376 kbase_reg_write(kbdev, GPU_CONTROL_REG(reg), lo); in kbase_pm_invoke()
378 kbase_reg_write(kbdev, GPU_CONTROL_REG(reg + 4), hi); in kbase_pm_invoke()
407 lo = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg)); in kbase_pm_get_state()
408 hi = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg + 4)); in kbase_pm_get_state()
543 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG)); in kbase_pm_l2_config_override()
544 kbase_reg_write(kbdev, GPU_CONTROL_REG(L2_CONFIG), in kbase_pm_l2_config_override()
557 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG)); in kbase_pm_l2_config_override()
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H A Dmali_kbase_time.c47 GPU_CONTROL_REG(TIMESTAMP_HI)); in kbase_backend_get_gpu_time_norequest()
49 GPU_CONTROL_REG(TIMESTAMP_LO)); in kbase_backend_get_gpu_time_norequest()
51 GPU_CONTROL_REG(TIMESTAMP_HI)); in kbase_backend_get_gpu_time_norequest()
83 if ((kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)) & in timedwait_cycle_count_active()
209 GPU_CONTROL_REG(CYCLE_COUNT_HI)); in kbase_backend_get_cycle_cnt()
211 GPU_CONTROL_REG(CYCLE_COUNT_LO)); in kbase_backend_get_cycle_cnt()
213 GPU_CONTROL_REG(CYCLE_COUNT_HI)); in kbase_backend_get_cycle_cnt()
H A Dmali_kbase_pm_internal.h965 GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_pm_enable_db_mirror_interrupt()
969 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), in kbase_pm_enable_db_mirror_interrupt()
989 GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_pm_disable_db_mirror_interrupt()
991 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), in kbase_pm_disable_db_mirror_interrupt()
H A Dmali_kbase_cache_policy_backend.c60 kbase_reg_read(kbdev, GPU_CONTROL_REG(AMBA_FEATURES)); in kbase_cache_get_coherency_features()
63 kbdev, GPU_CONTROL_REG(COHERENCY_FEATURES)); in kbase_cache_get_coherency_features()
H A Dmali_kbase_jm_hw.c905 GPU_CONTROL_REG(LATEST_FLUSH)); in kbase_backend_get_current_flush_id()
1044 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_debug_dump_registers()
1045 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS))); in kbase_debug_dump_registers()
1056 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS))); in kbase_debug_dump_registers()
1058 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)), in kbase_debug_dump_registers()
1062 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE0)), in kbase_debug_dump_registers()
1063 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE1))); in kbase_debug_dump_registers()
1065 kbase_reg_read(kbdev, GPU_CONTROL_REG(SHADER_CONFIG)), in kbase_debug_dump_registers()
1066 kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_MMU_CONFIG))); in kbase_debug_dump_registers()
1068 kbase_reg_read(kbdev, GPU_CONTROL_REG(TILER_CONFIG)), in kbase_debug_dump_registers()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A Dmali_kbase_gpuprops_backend.c35 regdump->gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID), NULL); in kbase_backend_gpuprops_get()
38 GPU_CONTROL_REG(L2_FEATURES), NULL); in kbase_backend_gpuprops_get()
40 GPU_CONTROL_REG(SUSPEND_SIZE), NULL); in kbase_backend_gpuprops_get()
42 GPU_CONTROL_REG(TILER_FEATURES), NULL); in kbase_backend_gpuprops_get()
44 GPU_CONTROL_REG(MEM_FEATURES), NULL); in kbase_backend_gpuprops_get()
46 GPU_CONTROL_REG(MMU_FEATURES), NULL); in kbase_backend_gpuprops_get()
48 GPU_CONTROL_REG(AS_PRESENT), NULL); in kbase_backend_gpuprops_get()
50 GPU_CONTROL_REG(JS_PRESENT), NULL); in kbase_backend_gpuprops_get()
54 GPU_CONTROL_REG(JS_FEATURES_REG(i)), NULL); in kbase_backend_gpuprops_get()
58 GPU_CONTROL_REG(TEXTURE_FEATURES_REG(i)), NULL); in kbase_backend_gpuprops_get()
[all …]
H A Dmali_kbase_instr_backend.c49 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL); in kbasep_instr_hwcnt_cacheclean()
50 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), in kbasep_instr_hwcnt_cacheclean()
57 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), in kbasep_instr_hwcnt_cacheclean()
100 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL); in kbase_instr_hwcnt_enable_internal()
101 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), irq_mask | in kbase_instr_hwcnt_enable_internal()
144 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_CONFIG), in kbase_instr_hwcnt_enable_internal()
147 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_LO), in kbase_instr_hwcnt_enable_internal()
149 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI), in kbase_instr_hwcnt_enable_internal()
151 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_JM_EN), in kbase_instr_hwcnt_enable_internal()
153 kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_SHADER_EN), in kbase_instr_hwcnt_enable_internal()
[all …]
H A Dmali_kbase_time.c33 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI), in kbase_backend_get_gpu_time()
36 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_backend_get_gpu_time()
37 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(CYCLE_COUNT_HI), in kbase_backend_get_gpu_time()
45 hi1 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI), in kbase_backend_get_gpu_time()
48 GPU_CONTROL_REG(TIMESTAMP_LO), NULL); in kbase_backend_get_gpu_time()
49 hi2 = kbase_reg_read(kbdev, GPU_CONTROL_REG(TIMESTAMP_HI), in kbase_backend_get_gpu_time()
88 GPU_CONTROL_REG(CYCLE_COUNT_LO), NULL); in kbase_wait_write_flush()
H A Dmali_kbase_pm_driver.c155 GPU_CONTROL_REG(GPU_COMMAND), in mali_cci_flush_l2()
160 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_cci_flush_l2()
167 GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_cci_flush_l2()
278 kbase_reg_write(kbdev, GPU_CONTROL_REG(reg), lo, NULL); in kbase_pm_invoke()
281 kbase_reg_write(kbdev, GPU_CONTROL_REG(reg + 4), hi, NULL); in kbase_pm_invoke()
309 lo = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg), NULL); in kbase_pm_get_state()
310 hi = kbase_reg_read(kbdev, GPU_CONTROL_REG(reg + 4), NULL); in kbase_pm_get_state()
958 GPU_CONTROL_REG(SHADER_READY_HI), NULL), in kbase_pm_check_transitions_sync()
960 GPU_CONTROL_REG(SHADER_READY_LO), in kbase_pm_check_transitions_sync()
964 GPU_CONTROL_REG(TILER_READY_HI), NULL), in kbase_pm_check_transitions_sync()
[all …]
H A Dmali_kbase_device_hw.c214 status = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS), NULL); in kbase_report_gpu_fault()
216 GPU_CONTROL_REG(GPU_FAULTADDRESS_HI), NULL) << 32; in kbase_report_gpu_fault()
218 GPU_CONTROL_REG(GPU_FAULTADDRESS_LO), NULL); in kbase_report_gpu_fault()
244 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val, NULL); in kbase_gpu_interrupt()
H A Dmali_kbase_jm_hw.c864 GPU_CONTROL_REG(LATEST_FLUSH), NULL); in kbase_backend_get_current_flush_id()
1125 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), NULL), in kbase_debug_dump_registers()
1126 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS), NULL)); in kbase_debug_dump_registers()
1139 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS), NULL)); in kbase_debug_dump_registers()
1141 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), NULL), in kbase_debug_dump_registers()
1145 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE0), NULL), in kbase_debug_dump_registers()
1146 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE1), NULL)); in kbase_debug_dump_registers()
1148 kbase_reg_read(kbdev, GPU_CONTROL_REG(SHADER_CONFIG), NULL), in kbase_debug_dump_registers()
1149 kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_MMU_CONFIG), NULL)); in kbase_debug_dump_registers()
1151 kbase_reg_read(kbdev, GPU_CONTROL_REG(TILER_CONFIG), NULL), in kbase_debug_dump_registers()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/device/
H A Dmali_kbase_device_hw.c35 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID)); in kbase_is_gpu_removed()
52 !(kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)) & irq_bit)) { in busy_wait_on_irq()
81 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), irq_bit); in busy_wait_on_irq()
99 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), FLUSH_PA_RANGE_COMPLETED); in kbase_gpu_cache_flush_pa_range_and_busy_wait()
105 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND_ARG0_LO), start_pa & U64_LO_MASK); in kbase_gpu_cache_flush_pa_range_and_busy_wait()
106 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND_ARG0_HI), in kbase_gpu_cache_flush_pa_range_and_busy_wait()
108 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND_ARG1_LO), end_pa & U64_LO_MASK); in kbase_gpu_cache_flush_pa_range_and_busy_wait()
109 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND_ARG1_HI), (end_pa & U64_HI_MASK) >> 32); in kbase_gpu_cache_flush_pa_range_and_busy_wait()
110 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), flush_op); in kbase_gpu_cache_flush_pa_range_and_busy_wait()
141 u32 irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_gpu_cache_flush_and_busy_wait()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/csf/
H A Dmali_kbase_csf_reset_gpu.c240 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT)), in kbase_csf_debug_dump_registers()
241 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)), in kbase_csf_debug_dump_registers()
242 kbase_reg_read(kbdev, GPU_CONTROL_REG(MCU_STATUS))); in kbase_csf_debug_dump_registers()
246 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS))); in kbase_csf_debug_dump_registers()
248 kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)), in kbase_csf_debug_dump_registers()
252 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE0)), in kbase_csf_debug_dump_registers()
253 kbase_reg_read(kbdev, GPU_CONTROL_REG(PWR_OVERRIDE1))); in kbase_csf_debug_dump_registers()
255 kbase_reg_read(kbdev, GPU_CONTROL_REG(SHADER_CONFIG)), in kbase_csf_debug_dump_registers()
256 kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_MMU_CONFIG)), in kbase_csf_debug_dump_registers()
257 kbase_reg_read(kbdev, GPU_CONTROL_REG(TILER_CONFIG))); in kbase_csf_debug_dump_registers()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/device/backend/
H A Dmali_kbase_device_hw_jm.c41 u32 status = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_FAULTSTATUS)); in kbase_report_gpu_fault()
43 GPU_CONTROL_REG(GPU_FAULTADDRESS_HI)) << 32; in kbase_report_gpu_fault()
46 GPU_CONTROL_REG(GPU_FAULTADDRESS_LO)); in kbase_report_gpu_fault()
71 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val & ~CLEAN_CACHES_COMPLETED); in kbase_gpu_interrupt()
H A Dmali_kbase_device_hw_csf.c46 GPU_CONTROL_REG(GPU_FAULTADDRESS_HI)) << 32; in kbase_report_gpu_fault()
49 GPU_CONTROL_REG(GPU_FAULTADDRESS_LO)); in kbase_report_gpu_fault()
60 GPU_CONTROL_REG(GPU_FAULTSTATUS)); in kbase_gpu_fault_interrupt()
103 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), in kbase_gpu_interrupt()
145 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val & ~CLEAN_CACHES_COMPLETED); in kbase_gpu_interrupt()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/
H A Dmali_kutf_irq_test_main.c88 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_STATUS), NULL); in kbase_gpu_irq_custom_handler()
95 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), val, in kbase_gpu_irq_custom_handler()
191 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_kutf_irq_latency()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/tests/mali_kutf_irq_test/
H A Dmali_kutf_irq_test_main.c91 u32 val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_STATUS)); in kbase_gpu_irq_custom_handler()
99 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), in kbase_gpu_irq_custom_handler()
197 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_RAWSTAT), in mali_kutf_irq_latency()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/mmu/backend/
H A Dmali_kbase_mmu_csf.c190 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), in kbase_gpu_report_bus_fault_and_kill()
298 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), in kbase_mmu_interrupt_process()
341 GPU_CONTROL_REG(GPU_FAULTADDRESS_HI)) << 32; in kbase_mmu_bus_fault_interrupt()
343 GPU_CONTROL_REG(GPU_FAULTADDRESS_LO)); in kbase_mmu_bus_fault_interrupt()
496 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND), in kbase_mmu_gpu_fault_worker()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_dummy_job_wa.c175 old_gpu_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK)); in kbase_dummy_job_wa_execute()
177 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), 0); in kbase_dummy_job_wa_execute()
227 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_CLEAR), U32_MAX); in kbase_dummy_job_wa_execute()
231 kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), old_gpu_mask); in kbase_dummy_job_wa_execute()
H A Dmali_kbase_pbha_debugfs.c43 u32 reg = kbase_reg_read(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i))); in int_id_overrides_show()
129 l2_config_val = L2_CONFIG_PBHA_HWU_GET(kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG))); in propagate_bits_show()
H A Dmali_kbase_pbha.c154 kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i))); in kbase_pbha_record_settings()
207 kbase_reg_write(kbdev, GPU_CONTROL_REG(SYSC_ALLOC(i)), in kbase_pbha_write_settings()
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/
H A Dmali_midg_regmap.h29 #define GPU_CONTROL_REG(r) (GPU_CONTROL_BASE + (r)) macro
96 #define TEXTURE_FEATURES_REG(n) GPU_CONTROL_REG(TEXTURE_FEATURES_0 + ((n) << 2))
115 #define JS_FEATURES_REG(n) GPU_CONTROL_REG(JS0_FEATURES + ((n) << 2))

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