Searched refs:GMAC0_DMA_RX_CTRL_ADDR (Results 1 – 2 of 2) sorted by relevance
41 #define GMAC0_DMA_RX_CTRL_ADDR (GMAC0_REG_BASE + 0x220) macro43 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_PTR_OFFSET)45 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_ADDR_LOW_OFFSET)47 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_ADDR_HIGH_OFFSET)49 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_STATUS0_OFFSET)51 (GMAC0_DMA_RX_CTRL_ADDR + GMAC_DMA_STATUS1_OFFSET)
135 readl(GMAC0_DMA_RX_CTRL_ADDR), in dma_rx_dump()275 (readl(GMAC0_DMA_RX_CTRL_ADDR) & D64_RC_BL_MASK) in dma_init()455 control = readl(GMAC0_DMA_RX_CTRL_ADDR); in gmac_check_rx_done()514 writel(0, GMAC0_DMA_RX_CTRL_ADDR); in gmac_disable_dma()555 control = (readl(GMAC0_DMA_RX_CTRL_ADDR) & in gmac_enable_dma()572 control |= readl(GMAC0_DMA_RX_CTRL_ADDR) & D64_RC_BL_MASK; in gmac_enable_dma()575 writel(control, GMAC0_DMA_RX_CTRL_ADDR); in gmac_enable_dma()