Searched refs:DMA_CONFIG5 (Results 1 – 2 of 2) sorted by relevance
328 #define DMA_CONFIG5 0x4410 // dma irq clear status macro
2023 hdmirx_writel(hdmirx_dev, DMA_CONFIG5, 0xffffffff); in hdmirx_stop_streaming()2110 hdmirx_writel(hdmirx_dev, DMA_CONFIG5, 0xffffffff); in hdmirx_start_streaming()2712 hdmirx_writel(hdmirx_dev, DMA_CONFIG5, 0xffffffff); in hdmirx_dma_irq_handler()2737 hdmirx_writel(hdmirx_dev, DMA_CONFIG5, 0xffffffff); in hdmirx_dma_irq_handler()