Searched refs:DGCS (Results 1 – 2 of 2) sorted by relevance
100 val = ioread32(bridge->base + DGCS); in ca91cx42_VERR_irqhandler()117 val = ioread32(bridge->base + DGCS); in ca91cx42_LERR_irqhandler()1169 tmp = ioread32(bridge->base + DGCS); in ca91cx42_dma_busy()1219 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()1228 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()1232 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()1238 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()1239 iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS); in ca91cx42_dma_list_exec()1251 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()
146 #define DGCS 0x0220 macro