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Searched refs:DDR_PCTL2_MRCTRL0 (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_pctl_px30.c18 writel((rank << 4) | (1 << 0), pctl_base + DDR_PCTL2_MRCTRL0); in pctl_read_mr()
20 setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31); in pctl_read_mr()
21 while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31)) in pctl_read_mr()
39 pctl_base + DDR_PCTL2_MRCTRL0); in pctl_write_mr()
43 pctl_base + DDR_PCTL2_MRCTRL0); in pctl_write_mr()
48 setbits_le32(pctl_base + DDR_PCTL2_MRCTRL0, 1u << 31); in pctl_write_mr()
49 while (readl(pctl_base + DDR_PCTL2_MRCTRL0) & (1u << 31)) in pctl_write_mr()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dsdram_pctl_px30.h18 #define DDR_PCTL2_MRCTRL0 0x10 macro