Searched refs:DDR_MODE_DDR3 (Results 1 – 7 of 7) sorted by relevance
| /OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/ |
| H A D | dmc_init_ddr3.c | 78 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init() 103 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init() 212 update_reset_dll(&dmc->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init() 494 val |= (DDR_MODE_DDR3 << PHY_CON0_CTRL_DDR_MODE_SHIFT); in ddr3_mem_ctrl_init() 499 val |= (DDR_MODE_DDR3 << PHY_CON0_CTRL_DDR_MODE_SHIFT); in ddr3_mem_ctrl_init() 568 update_reset_dll(&drex0->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init() 569 update_reset_dll(&drex1->phycontrol0, DDR_MODE_DDR3); in ddr3_mem_ctrl_init()
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| H A D | dmc_common.c | 80 if (mode == DDR_MODE_DDR3) { in update_reset_dll() 164 if (param->mem_type == DDR_MODE_DDR3) { in mem_ctrl_init()
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| H A D | clock_init_exynos5.c | 143 .mem_type = DDR_MODE_DDR3, 269 .mem_type = DDR_MODE_DDR3, 372 .mem_type = DDR_MODE_DDR3,
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| /OK3568_Linux_fs/u-boot/board/samsung/smdk5250/ |
| H A D | smdk5250_spl.c | 23 .mem_type = DDR_MODE_DDR3,
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| /OK3568_Linux_fs/u-boot/board/samsung/smdk5420/ |
| H A D | smdk5420_spl.c | 23 .mem_type = DDR_MODE_DDR3,
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| /OK3568_Linux_fs/u-boot/board/samsung/arndale/ |
| H A D | arndale_spl.c | 21 .mem_type = DDR_MODE_DDR3,
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | dmc.h | 433 DDR_MODE_DDR3, enumerator
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