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Searched refs:CLK_PWM2_SEL_SHIFT (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rv1106.h224 CLK_PWM2_SEL_SHIFT = 11, enumerator
225 CLK_PWM2_SEL_MASK = 0x3 << CLK_PWM2_SEL_SHIFT,
H A Dcru_rv1126.h290 CLK_PWM2_SEL_SHIFT = 15, enumerator
291 CLK_PWM2_SEL_MASK = 1 << CLK_PWM2_SEL_SHIFT,
H A Dcru_rk3588.h242 CLK_PWM2_SEL_SHIFT = 14, enumerator
243 CLK_PWM2_SEL_MASK = 3 << CLK_PWM2_SEL_SHIFT,
H A Dcru_rk3568.h458 CLK_PWM2_SEL_SHIFT = 10, enumerator
459 CLK_PWM2_SEL_MASK = 3 << CLK_PWM2_SEL_SHIFT,
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rv1106.c637 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1106_pwm_get_clk()
682 src_clk << CLK_PWM2_SEL_SHIFT); in rv1106_pwm_set_clk()
H A Dclk_rv1126.c886 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rv1126_pwm_get_clk()
901 CLK_PWM2_SEL_XIN24M << CLK_PWM2_SEL_SHIFT); in rv1126_pwm_set_clk()
909 CLK_PWM2_SEL_GPLL << CLK_PWM2_SEL_SHIFT); in rv1126_pwm_set_clk()
H A Dclk_rk3588.c585 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rk3588_pwm_get_clk()
633 src_clk << CLK_PWM2_SEL_SHIFT); in rk3588_pwm_set_clk()
H A Dclk_rk3568.c1166 sel = (con & CLK_PWM2_SEL_MASK) >> CLK_PWM2_SEL_SHIFT; in rk3568_pwm_get_clk()
1207 src_clk << CLK_PWM2_SEL_SHIFT); in rk3568_pwm_set_clk()