Searched refs:CLK_PWM1_DIV_CON_MASK (Results 1 – 2 of 2) sorted by relevance
282 CLK_PWM1_DIV_CON_MASK = 0x7f << CLK_PWM1_DIV_CON_SHIFT, enumerator
333 div = (con & CLK_PWM1_DIV_CON_MASK) >> CLK_PWM1_DIV_CON_SHIFT; in rk1808_pwm_get_clk()365 CLK_PWM1_DIV_CON_MASK | CLK_PWM1_PLL_SEL_MASK, in rk1808_pwm_set_clk()