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Searched refs:CLKMGR_MAINPLLGRP_L4SRC_L4SP (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h218 #define CLKMGR_MAINPLLGRP_L4SRC_L4SP BIT(1) macro
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c411 reg = (reg & CLKMGR_MAINPLLGRP_L4SRC_L4SP) >> in cm_get_l4_sp_clk_hz()