Searched refs:CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 (Results 1 – 8 of 8) sorted by relevance
53 #define CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 0x00080000 macro63 | CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 \
96 case CAIL_PCIE_LINK_WIDTH_SUPPORT_X8: in get_pcie_lane_support()
4813 CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()4821 CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()4828 CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()4834 adev->pm.pcie_mlw_mask = (CAIL_PCIE_LINK_WIDTH_SUPPORT_X8 | in amdgpu_device_get_pcie_info()
995 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu_smc_hw_setup()
508 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega12_override_pcie_parameters()
854 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega20_override_pcie_parameters()
1533 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in vega10_override_pcie_parameters()
560 else if (adev->pm.pcie_mlw_mask & CAIL_PCIE_LINK_WIDTH_SUPPORT_X8) in smu7_override_pcie_width()