| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/hal/rtl8188f/ |
| H A D | rtl8188f_phycfg.c | 868 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
903 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8188F()
937 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
948 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
959 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
970 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
981 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter*/ in phy_SpurCalibration_8188F()
992 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1002 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
1011 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
[all …]
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/hal/rtl8188f/ |
| H A D | rtl8188f_phycfg.c | 889 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
924 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8188F()
958 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
969 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
980 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
991 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1002 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter*/ in phy_SpurCalibration_8188F()
1013 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1023 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
1032 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/txbf/ |
| H A D | haltxbf8822b.c | 422 ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, STAid | BIT9); in HalTxbf8822B_Enter()
554 pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); in HalTxbf8822B_Enter()
555 pBeamformingInfo->RegMUTxCtrl |= (pBeamformeeEntry->mu_reg_index << 8)&(BIT8|BIT9|BIT10); in HalTxbf8822B_Enter()
572 value16 |= BIT9; /*Enable MU BFee*/ in HalTxbf8822B_Enter()
751 BeamCtrlVal |= BIT9; in HalTxbf8822B_Status()
753 BeamCtrlVal |= (BIT9|BIT10); in HalTxbf8822B_Status()
755 BeamCtrlVal |= (BIT9|BIT10|BIT11); in HalTxbf8822B_Status()
758 BeamCtrlVal &= ~(BIT9|BIT10|BIT11); in HalTxbf8822B_Status()
840 pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); in HalTxbf8822B_Status()
841 pBeamformingInfo->RegMUTxCtrl |= ((idx<<8)&(BIT8|BIT9|BIT10)); in HalTxbf8822B_Status()
[all …]
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| H A D | haltxbfjaguar.c | 290 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); in HalTxbfJaguar_Enter()
380 BeamCtrlVal |= BIT9; in HalTxbfJaguar_Status()
382 BeamCtrlVal |= (BIT9 | BIT10); in HalTxbfJaguar_Status()
384 BeamCtrlVal |= (BIT9 | BIT10 | BIT11); in HalTxbfJaguar_Status()
386 BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); in HalTxbfJaguar_Status()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/hal/rtl8188f/ |
| H A D | rtl8188f_phycfg.c | 844 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
879 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8188F()
913 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
924 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
935 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
946 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
957 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter*/ in phy_SpurCalibration_8188F()
968 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
978 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
987 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/hal/rtl8188f/ |
| H A D | rtl8188f_phycfg.c | 935 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
970 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8188F()
1004 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1015 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1026 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1037 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1048 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter*/ in phy_SpurCalibration_8188F()
1059 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /*enable notch filter */ in phy_SpurCalibration_8188F()
1069 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
1078 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /*disable notch filter */ in phy_SpurCalibration_8188F()
[all …]
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/txbf/ |
| H A D | haltxbf8822b.c | 551 ODM_Write2Byte(pDM_Odm, REG_ASSOCIATED_BFMEE_SEL_8822B, STAid | BIT9); in HalTxbf8822B_Enter()
681 pBeamformingInfo->RegMUTxCtrl &= ~(BIT8|BIT9|BIT10); in HalTxbf8822B_Enter()
682 pBeamformingInfo->RegMUTxCtrl |= (pBeamformeeEntry->mu_reg_index << 8)&(BIT8|BIT9|BIT10); in HalTxbf8822B_Enter()
696 value16 |= BIT9; /*Enable MU BFee*/ in HalTxbf8822B_Enter()
858 BeamCtrlVal |= BIT9; in HalTxbf8822B_Status()
860 BeamCtrlVal |= (BIT9|BIT10); in HalTxbf8822B_Status()
862 BeamCtrlVal |= (BIT9|BIT10|BIT11); in HalTxbf8822B_Status()
865 BeamCtrlVal &= ~(BIT9|BIT10|BIT11); in HalTxbf8822B_Status()
931 pBeamformingInfo->RegMUTxCtrl |= ~(BIT8|BIT9|BIT10); in HalTxbf8822B_Status()
932 pBeamformingInfo->RegMUTxCtrl |= ((idx<<8)&(BIT8|BIT9|BIT10)); in HalTxbf8822B_Status()
[all …]
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| H A D | haltxbfjaguar.c | 290 ODM_Write2Byte(pDM_Odm, REG_BFMEE_SEL_8812A, STAid | BIT9); in HalTxbfJaguar_Enter()
380 BeamCtrlVal |= BIT9; in HalTxbfJaguar_Status()
382 BeamCtrlVal |= (BIT9 | BIT10); in HalTxbfJaguar_Status()
384 BeamCtrlVal |= (BIT9 | BIT10 | BIT11); in HalTxbfJaguar_Status()
386 BeamCtrlVal &= ~(BIT9 | BIT10 | BIT11); in HalTxbfJaguar_Status()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/ |
| H A D | hal_com_reg.h | 666 #define RRSR_36M BIT9
844 #define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup
860 #define IMR_C2HCMD BIT9
892 #define PHIMR_CPWM2 BIT9
915 #define PHIMR_TXFOVW BIT9
943 #define UHIMR_CPWM2 BIT9
968 #define UHIMR_TXFOVW BIT9
997 #define IMR_CPWM2_88E BIT9 // CPU power Mode exchange INT Status, Write 1 clear
1026 #define IMR_TXFOVW_88E BIT9 // Transmit FIFO Overflow
1091 #define RCR_AICV BIT9 // Accept ICV error packet
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| H A D | rtl8723b_spec.h | 243 #define IMR_CPWM2_8723B BIT9 // CPU power Mode exchange INT Status, Write 1 clear
272 #define IMR_TXFOVW_8723B BIT9 // Transmit FIFO Overflow
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/include/ |
| H A D | hal_com_reg.h | 666 #define RRSR_36M BIT9
844 #define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup
860 #define IMR_C2HCMD BIT9
892 #define PHIMR_CPWM2 BIT9
915 #define PHIMR_TXFOVW BIT9
943 #define UHIMR_CPWM2 BIT9
968 #define UHIMR_TXFOVW BIT9
997 #define IMR_CPWM2_88E BIT9 // CPU power Mode exchange INT Status, Write 1 clear
1026 #define IMR_TXFOVW_88E BIT9 // Transmit FIFO Overflow
1091 #define RCR_AICV BIT9 // Accept ICV error packet
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| /OK3568_Linux_fs/kernel/drivers/staging/rtl8723bs/include/ |
| H A D | hal_com_reg.h | 617 #define RRSR_36M BIT9
795 #define IMR_BDOK BIT9 /* Beacon Queue DMA OK Interrup */
811 #define IMR_C2HCMD BIT9
843 #define PHIMR_CPWM2 BIT9
866 #define PHIMR_TXFOVW BIT9
894 #define UHIMR_CPWM2 BIT9
919 #define UHIMR_TXFOVW BIT9
948 #define IMR_CPWM2_88E BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
977 #define IMR_TXFOVW_88E BIT9 /* Transmit FIFO Overflow */
1042 #define RCR_AICV BIT9 /* Accept ICV error packet */
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| H A D | rtl8723b_spec.h | 217 #define IMR_CPWM2_8723B BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
246 #define IMR_TXFOVW_8723B BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/ |
| H A D | phydm_ccx.c | 20 ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9, CCX_INFO->NHM_inexclude_cca); in phydm_NHMsetting()
46 …_INFO->NHM_inexclude_cca_restore = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9); in phydm_NHMsetting()
68 ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9, CCX_INFO->NHM_inexclude_cca_restore); in phydm_NHMsetting()
96 ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9, CCX_INFO->NHM_inexclude_cca); in phydm_NHMsetting()
121 …X_INFO->NHM_inexclude_cca_restore = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9); in phydm_NHMsetting()
144 ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9, CCX_INFO->NHM_inexclude_cca_restore); in phydm_NHMsetting()
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| H A D | phydm_pathdiv.c | 97 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
107 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
117 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
166 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
182 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
199 ODM_SetBBReg( pDM_Odm, 0x940, BIT9|BIT8, 0); in phydm_dtp_fix_tx_path()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/include/ |
| H A D | hal_com_reg.h | 685 #define RRSR_36M BIT9
871 #define IMR_BDOK BIT9 /* Beacon Queue DMA OK Interrup */
887 #define IMR_C2HCMD BIT9
919 #define PHIMR_CPWM2 BIT9
942 #define PHIMR_TXFOVW BIT9
970 #define UHIMR_CPWM2 BIT9
995 #define UHIMR_TXFOVW BIT9
1024 #define IMR_CPWM2_88E BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
1053 #define IMR_TXFOVW_88E BIT9 /* Transmit FIFO Overflow */
1118 #define RCR_AICV BIT9 /* Accept ICV error packet */
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| H A D | rtl8723b_spec.h | 243 #define IMR_CPWM2_8723B BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
272 #define IMR_TXFOVW_8723B BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723cs/hal/rtl8703b/ |
| H A D | rtl8703b_phycfg.c | 859 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8703B()
889 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8703B()
898 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8703B()
907 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8703B()
916 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8703B()
925 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8703B()
933 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ in phy_SpurCalibration_8703B()
940 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ in phy_SpurCalibration_8703B()
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/rtl8723b/ |
| H A D | rtl8723b_phycfg.c | 975 bSW_Ctrl_S1 = ((reg948 & BIT9) == 0x0) ? TRUE : FALSE; in phy_SpurCalibration_8723B()
1005 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8723B()
1014 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8723B()
1023 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8723B()
1032 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8723B()
1041 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x1); /* enable notch filter */ in phy_SpurCalibration_8723B()
1049 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ in phy_SpurCalibration_8723B()
1056 odm_set_bb_reg(pDM_Odm, 0xC40, BIT9, 0x0); /* disable notch filter */ in phy_SpurCalibration_8723B()
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8189fs/include/ |
| H A D | rtl8812a_spec.h | 203 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
232 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/external/rkwifibt/drivers/rtl8723ds/include/ |
| H A D | rtl8812a_spec.h | 203 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
232 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723ds/include/ |
| H A D | rtl8812a_spec.h | 204 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
233 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8821cs/include/ |
| H A D | rtl8812a_spec.h | 204 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
233 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8188fu/include/ |
| H A D | rtl8812a_spec.h | 204 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
233 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/include/ |
| H A D | rtl8812a_spec.h | 203 #define IMR_CPWM2_8812 BIT9 /* CPU power Mode exchange INT Status, Write 1 clear */
232 #define IMR_TXFOVW_8812 BIT9 /* Transmit FIFO Overflow */
|