Searched refs:AIPS1_OFF_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance
171 #define AIPS1_OFF_BASE_ADDR (ATZ1_BASE_ADDR + 0x80000) macro172 #define PWM1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x0000)173 #define PWM2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x4000)174 #define PWM3_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x8000)175 #define PWM4_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0xC000)176 #define CAN1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x10000)177 #define CAN2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x14000)179 #define QOSC_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x14000)180 #define GPT1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x18000)181 #define GPIO1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x1C000)[all …]
87 #define AIPS1_OFF_BASE_ADDR (AIPS_TZ1_BASE_ADDR+0x200000) macro89 #define GPIO1_BASE_ADDR AIPS1_OFF_BASE_ADDR90 #define GPIO2_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x10000)91 #define GPIO3_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x20000)92 #define GPIO4_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x30000)93 #define GPIO5_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x40000)94 #define GPIO6_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x50000)95 #define GPIO7_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x60000)96 #define IOMUXC_LPSR_GPR_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x70000)97 #define WDOG1_BASE_ADDR (AIPS1_OFF_BASE_ADDR+0x80000)[all …]