1 /*
2 * Copyright (c) 2013-2026, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <assert.h>
8
9 #include <common/bl_common.h>
10 #include <common/debug.h>
11 #include <drivers/arm/smmu_v3.h>
12 #include <fconf_hw_config_getter.h>
13 #include <lib/fconf/fconf.h>
14 #include <lib/fconf/fconf_dyn_cfg_getter.h>
15 #include <lib/mmio.h>
16
17 #include <plat/arm/common/arm_config.h>
18 #include <plat/arm/common/plat_arm.h>
19 #include <plat/common/platform.h>
20
21 #include "fvp_private.h"
22
23 static const struct dyn_cfg_dtb_info_t *hw_config_info __unused;
24
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)25 void __init bl31_early_platform_setup2(u_register_t arg0,
26 u_register_t arg1, u_register_t arg2, u_register_t arg3)
27 {
28 /* Initialize the console to provide early debug support */
29 arm_console_boot_init();
30
31 #if (!TRANSFER_LIST && !RESET_TO_BL31 && (!RESET_TO_BL2 || \
32 ARM_FW_CONFIG_LOAD_ENABLE))
33 const struct dyn_cfg_dtb_info_t *soc_fw_config_info;
34
35 INFO("BL31 FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
36 /* Fill the properties struct with the info from the config dtb */
37 fconf_populate("FW_CONFIG", arg1);
38
39 soc_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, SOC_FW_CONFIG_ID);
40 if (soc_fw_config_info != NULL) {
41 arg1 = soc_fw_config_info->config_addr;
42 }
43
44 /*
45 * arg2 is currently holding the 'secure' address of HW_CONFIG.
46 * But arm_bl31_early_platform_setup() below expects the 'non-secure'
47 * address of HW_CONFIG (which it will pass to BL33).
48 * This why we need to override arg2 here.
49 */
50 hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
51 assert(hw_config_info != NULL);
52 assert(hw_config_info->secondary_config_addr != 0UL);
53 arg2 = hw_config_info->secondary_config_addr;
54 #endif
55
56 arm_bl31_early_platform_setup(arg0, arg1, arg2, arg3);
57
58 /* Initialize the platform config for future decision making */
59 fvp_config_setup();
60
61 /*
62 * Initialize the correct interconnect for this cluster during cold
63 * boot. No need for locks as no other CPU is active.
64 */
65 fvp_interconnect_init();
66
67 /*
68 * Enable coherency in interconnect for the primary CPU's cluster.
69 * Earlier bootloader stages might already do this (e.g. Trusted
70 * Firmware's BL1 does it) but we can't assume so. There is no harm in
71 * executing this code twice anyway.
72 * FVP PSCI code will enable coherency for other clusters.
73 */
74 fvp_interconnect_enable();
75
76 /* Initialize System level generic or SP804 timer */
77 fvp_timer_init();
78
79 /* On FVP RevC, initialize SMMUv3 */
80 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U) {
81 if (smmuv3_security_init(PLAT_FVP_SMMUV3_BASE) != 0) {
82 /*
83 * Don't proceed for smmuv3 initialization if the
84 * security init failed.
85 */
86 return;
87 }
88 /* SMMUv3 initialization failure is not fatal */
89 if (smmuv3_init(PLAT_FVP_SMMUV3_BASE) != 0) {
90 WARN("Failed initializing SMMU.\n");
91 }
92 }
93 }
94
bl31_plat_arch_setup(void)95 void __init bl31_plat_arch_setup(void)
96 {
97 arm_bl31_plat_arch_setup();
98
99 #if !TRANSFER_LIST
100 int rc __unused;
101 uintptr_t hw_config_base_align __unused;
102 size_t mapped_size_align __unused;
103
104 /*
105 * For RESET_TO_BL31 systems, BL31 is the first bootloader to run.
106 * So there is no BL2 to load the HW_CONFIG dtb into memory before
107 * control is passed to BL31. The code below relies on dynamic mapping
108 * capability, which is not supported by xlat tables lib V1.
109 * TODO: remove the ARM_XLAT_TABLES_LIB_V1 check when its support
110 * gets deprecated.
111 */
112 #if (!RESET_TO_BL31 && (!RESET_TO_BL2 || ARM_FW_CONFIG_LOAD_ENABLE) && \
113 !ARM_XLAT_TABLES_LIB_V1)
114 assert(hw_config_info != NULL);
115 assert(hw_config_info->config_addr != 0UL);
116
117 /* Page aligned address and size if necessary */
118 hw_config_base_align = page_align(hw_config_info->config_addr, DOWN);
119 mapped_size_align = page_align(hw_config_info->config_max_size, UP);
120
121 if ((hw_config_info->config_addr != hw_config_base_align) &&
122 (hw_config_info->config_max_size == mapped_size_align)) {
123 mapped_size_align += PAGE_SIZE;
124 }
125
126 /*
127 * map dynamically HW config region with its aligned base address and
128 * size
129 */
130 rc = mmap_add_dynamic_region((unsigned long long)hw_config_base_align,
131 hw_config_base_align,
132 mapped_size_align,
133 MT_RO_DATA);
134 if (rc != 0) {
135 ERROR("Error while mapping HW_CONFIG device tree (%d).\n", rc);
136 panic();
137 }
138
139 /* Populate HW_CONFIG device tree with the mapped address */
140 fconf_populate("HW_CONFIG", hw_config_info->config_addr);
141
142 /* unmap the HW_CONFIG memory region */
143 rc = mmap_remove_dynamic_region(hw_config_base_align, mapped_size_align);
144 if (rc != 0) {
145 ERROR("Error while unmapping HW_CONFIG device tree (%d).\n",
146 rc);
147 panic();
148 }
149 #endif /* !RESET_TO_BL31 && !RESET_TO_BL2 && !ARM_XLAT_TABLES_LIB_V1 */
150 #endif /* TRANSFER_LIST */
151
152 #if USE_GIC_DRIVER == 3
153 fvp_gic_driver_pre_init();
154 #endif
155 }
156
plat_get_syscnt_freq2(void)157 unsigned int plat_get_syscnt_freq2(void)
158 {
159 unsigned int counter_base_frequency;
160
161 #if !RESET_TO_BL31 && (!RESET_TO_BL2 || ARM_FW_CONFIG_LOAD_ENABLE)
162 /* Get the frequency through FCONF API for HW_CONFIG */
163 counter_base_frequency = FCONF_GET_PROPERTY(hw_config, cpu_timer, clock_freq);
164 if (counter_base_frequency > 0U) {
165 return counter_base_frequency;
166 }
167 #endif
168
169 /* Read the frequency from Frequency modes table */
170 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF);
171
172 /* The first entry of the frequency modes table must not be 0 */
173 if (counter_base_frequency == 0U) {
174 panic();
175 }
176
177 return counter_base_frequency;
178 }
179