xref: /rk3399_ARM-atf/plat/arm/board/morello/platform.mk (revision ddc1fcee5df039c3c4d0105831b2e0b5a6f1f566) 
1#
2# Copyright (c) 2020-2025, Arm Limited. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Making sure the Morello platform type is specified
8ifeq ($(filter ${TARGET_PLATFORM}, fvp soc),)
9       $(error TARGET_PLATFORM must be fvp or soc)
10endif
11
12MORELLO_BASE		:=	plat/arm/board/morello
13
14PLAT_INCLUDES		:=	-I${MORELLO_BASE}/include
15
16MORELLO_CPU_SOURCES	:=	lib/cpus/aarch64/rainier.S
17
18# GIC-600 configuration
19USE_GIC_DRIVER		:=	3
20GICV3_SUPPORT_GIC600	:=	1
21
22PLAT_BL_COMMON_SOURCES	:=	${MORELLO_BASE}/morello_plat.c		\
23				${MORELLO_BASE}/aarch64/morello_helper.S
24
25BL1_SOURCES		:=	${MORELLO_CPU_SOURCES}			\
26				${MORELLO_BASE}/morello_err.c		\
27				${MORELLO_BASE}/morello_trusted_boot.c	\
28				${MORELLO_BASE}/morello_bl1_setup.c	\
29				drivers/arm/sbsa/sbsa.c
30
31BL2_SOURCES		:=	${MORELLO_BASE}/morello_security.c	\
32				${MORELLO_BASE}/morello_err.c		\
33				${MORELLO_BASE}/morello_trusted_boot.c	\
34				${MORELLO_BASE}/morello_bl2_setup.c	\
35				${MORELLO_BASE}/morello_image_load.c	\
36				lib/utils/mem_region.c			\
37				drivers/arm/css/sds/sds.c
38
39BL31_SOURCES		:=	${MORELLO_CPU_SOURCES}			\
40				${MORELLO_BASE}/morello_bl31_setup.c	\
41				${MORELLO_BASE}/morello_pm.c		\
42				${MORELLO_BASE}/morello_topology.c	\
43				${MORELLO_BASE}/morello_security.c	\
44				drivers/arm/css/sds/sds.c
45
46FDT_SOURCES		+=	fdts/morello-${TARGET_PLATFORM}.dts		\
47				${MORELLO_BASE}/fdts/morello_fw_config.dts	\
48				${MORELLO_BASE}/fdts/morello_tb_fw_config.dts	\
49				${MORELLO_BASE}/fdts/morello_nt_fw_config.dts
50
51FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_fw_config.dtb
52HW_CONFIG		:=	${BUILD_PLAT}/fdts/morello-${TARGET_PLATFORM}.dtb
53TB_FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_tb_fw_config.dtb
54NT_FW_CONFIG		:=	${BUILD_PLAT}/fdts/morello_nt_fw_config.dtb
55
56# Add the FW_CONFIG to FIP and specify the same to certtool
57$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
58# Add the HW_CONFIG to FIP and specify the same to certtool
59$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
60# Add the TB_FW_CONFIG to FIP and specify the same to certtool
61$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
62# Add the NT_FW_CONFIG to FIP and specify the same to certtool
63$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
64
65MORELLO_FW_NVCTR_VAL	:=	0
66TFW_NVCTR_VAL		:=	${MORELLO_FW_NVCTR_VAL}
67NTFW_NVCTR_VAL		:=	${MORELLO_FW_NVCTR_VAL}
68
69# TF-A not required to load the SCP Images
70override CSS_LOAD_SCP_IMAGES		:=	0
71
72override NEED_BL2U			:=	no
73
74# 32 bit mode not supported
75override CTX_INCLUDE_AARCH32_REGS	:=	0
76
77override ARM_PLAT_MT			:=	1
78
79override ARM_BL31_IN_DRAM		:=	1
80
81override PSCI_EXTENDED_STATE_ID		:=	1
82override ARM_RECOM_STATE_ID_ENC		:=	1
83
84# Errata workarounds:
85ERRATA_N1_1868343			:=	1
86
87# Select SCMI/SDS drivers instead of SCPI/BOM driver for communicating with the
88# SCP during power management operations and for SCP RAM Firmware transfer.
89CSS_USE_SCMI_SDS_DRIVER			:=	1
90
91# System coherency is managed in hardware
92HW_ASSISTED_COHERENCY			:=	1
93
94# When building for systems with hardware-assisted coherency, there's no need to
95# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too.
96USE_COHERENT_MEM			:=	0
97
98# Add TARGET_PLATFORM to differentiate between Morello FVP and Morello SoC platform
99$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
100
101# Add MORELLO_FW_NVCTR_VAL
102$(eval $(call add_define,MORELLO_FW_NVCTR_VAL))
103
104include plat/arm/common/arm_common.mk
105include plat/arm/css/common/css_common.mk
106include plat/arm/board/common/board_common.mk
107