| #
ddc1fcee |
| 26-Sep-2025 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(arm/common): gate coherency behind flag" into integration
|
| #
36fbcf4d |
| 17-Sep-2025 |
Ahmed Azeem <ahmed.azeem@arm.com> |
refactor(arm/common): gate coherency behind flag
Introduce a macro guard so platform coherency functions are only
compiled when HW_ASSISTED_COHERENCY is 0 (disabled). Many platforms
enable HW-assist
refactor(arm/common): gate coherency behind flag
Introduce a macro guard so platform coherency functions are only
compiled when HW_ASSISTED_COHERENCY is 0 (disabled). Many platforms
enable HW-assisted coherency by default, so compiling empty
definitions is unnecessary.
This refactor removes those empty functions for Arm CSS platforms.
Change-Id: I102ead46960e9da2d8b968f60cbfd3e5e5da1096
Signed-off-by: Ahmed Azeem <ahmed.azeem@arm.com>
show more ...
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| #
139a5d05 |
| 18-Apr-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refacto
Merge changes I86959e67,I0b0d1d36,I5b5267f4,I056c8710,I3474aa97 into integration
* changes:
chore: fix preprocessor checks
refactor: convert arm platforms to use the generic GIC driver
refactor(gic): promote most of the GIC driver to common code
refactor: make arm_gicv2.c and arm_gicv3.c common
refactor(fvp): use more arm generic code for gicv3
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| #
c5c54e20 |
| 07-Jan-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: convert arm platforms to use the generic GIC driver
This reduces the code the platforms have to carry and makes their build
rules a bit simpler.
The main benefit is that plat_my_core_pos(
refactor: convert arm platforms to use the generic GIC driver
This reduces the code the platforms have to carry and makes their build
rules a bit simpler.
The main benefit is that plat_my_core_pos() no longer needs to be called
within the driver, helping with performance a bit.
Change-Id: I0b0d1d36d20d67c41c8c9dc14ade11bda6d4a6af
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
35d18d8d |
| 07-Jan-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor: make arm_gicv2.c and arm_gicv3.c common
These files were meant to be platform specific, but they are generic
enough that a range of platforms find them useful. However, refactoring
them is
refactor: make arm_gicv2.c and arm_gicv3.c common
These files were meant to be platform specific, but they are generic
enough that a range of platforms find them useful. However, refactoring
them is difficult as their use is platform specific. So copy them to a
generic place and redirect platforms to them.
The new copies will remain for compatibility for platforms that don't
want to or can't take up upcoming refactors and the old copies can be
drastically refactored to make them more widely applicable.
Change-Id: I056c8710cdda4d8a81b324d392762c29e02cdae1
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| #
895d973d |
| 04-Feb-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(morello): remove stray white-space in 'morello/platform.mk'" into integration
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| #
05533d99 |
| 08-Dec-2024 |
Bhupesh Sharma <Bhupesh.Sharma@arm.com> |
fix(morello): remove stray white-space in 'morello/platform.mk'
Stray white-space in 'morello/platform.mk' to fix the
following compilation error:
$ make PLAT=morello TARGET_PLATFORM=2 all
plat/a
fix(morello): remove stray white-space in 'morello/platform.mk'
Stray white-space in 'morello/platform.mk' to fix the
following compilation error:
$ make PLAT=morello TARGET_PLATFORM=2 all
plat/arm/board/morello/platform.mk:9: *** recipe commences
before first target. Stop.
Fix the same.
While at it also update the year range in the
'Copyright' field.
Change-Id: Id05e4968952049df5ffbe0d25dd17f3aa3a035f7
Signed-off-by: Bhupesh Sharma <Bhupesh.Sharma@arm.com>
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| #
eb46520c |
| 06-Sep-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): add cpuidle support" into integration
|
| #
4f7330dc |
| 25-May-2023 |
sahil <sahil@arm.com> |
feat(morello): add cpuidle support
This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.
Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Sig
feat(morello): add cpuidle support
This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.
Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Iaf95867095f0514ec3994b9c9efd9756ed49ef43
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| #
5bfdb732 |
| 11-May-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(morello): add platform-specific power domain functions" into integration
|
| #
02a5bcb0 |
| 15-Feb-2023 |
Werner Lewis <werner.lewis@arm.com> |
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor
power off to resolve an error on N1SDP/Morello. Prior to this fix,
tu
fix(morello): add platform-specific power domain functions
Commit 4d8c18196378824e388cf31ef991ba8fbbb09cbf added a redistributor
power off to resolve an error on N1SDP/Morello. Prior to this fix,
turning off both cores in a cluster would cause a hang when powering
back on either core. This change introduced issues on other platforms
with a different GIC implementation, and was reverted in commit
60719e4e0965aead49d927f12bf2a37bd2629012.
This commit uses the previous fix in platform-specific implementations
of power domain off/suspend functions.
Signed-off-by: Werner Lewis <werner.lewis@arm.com>
Change-Id: Ib7689a5e08ada3862406fa92019a6f0bcfb48d79
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| #
3c24d222 |
| 30-Jan-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(morello): add support for HW_CONFIG" into integration
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| #
be79071e |
| 14-Sep-2022 |
Patrik Berglund <patrik.berglund@arm.com> |
feat(morello): add support for HW_CONFIG
This patch add support to load HW_CONFIG in BL2 and pass it to
bootloader stages BL31 and BL33.
Signed-off-by: Patrik Berglund <patrik.berglund@arm.com>
Cha
feat(morello): add support for HW_CONFIG
This patch add support to load HW_CONFIG in BL2 and pass it to
bootloader stages BL31 and BL33.
Signed-off-by: Patrik Berglund <patrik.berglund@arm.com>
Change-Id: I646fabed83dbca5322a59a399de5194cfef474ad
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| #
92eba866 |
| 07-Jul-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(morello): move BL31 to run from DRAM space" into integration
|
| #
05330a49 |
| 23-Jun-2022 |
Manoj Kumar <manoj.kumar3@arm.com> |
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted
SRAM space on the Morello platform. Due to unavailability of tag
support for the intern
fix(morello): move BL31 to run from DRAM space
The EL3 runtime firmware has been running from internal trusted
SRAM space on the Morello platform. Due to unavailability of tag
support for the internal trusted SRAM this becomes a problem if
we enable capability pointers in BL31.
To support capability pointers in BL31 it has to be run from the
main DDR memory space. This patch updates the Morello platform
configuration such that BL31 is loaded and run from DDR space.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Change-Id: I16d4d757fb6f58c364f5133236d50fc06845e0b4
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| #
cbbcf9b1 |
| 06-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ifea8148e,I73559522 into integration
* changes:
fix(morello): include errata workaround for 1868343
fix(errata): workaround for Rainier erratum 1868343
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| #
f94c84ba |
| 05-Jan-2022 |
Manoj Kumar <manoj.kumar3@arm.com> |
fix(morello): include errata workaround for 1868343
This patch includes the errata workaround for erratum
1868343 for the Morello platform.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Change-
fix(morello): include errata workaround for 1868343
This patch includes the errata workaround for erratum
1868343 for the Morello platform.
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Change-Id: Ifea8148e10946db2276560f90bf2f32bf12b9dcc
show more ...
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| #
1d996e56 |
| 17-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add sup
Merge changes from topic "morello_plat_support" into integration
* changes:
feat(morello): expose scmi protocols in fdts
fix(morello): change the AP runtime UART address
feat(morello): add support for nt_fw_config
feat(morello): split platform_info sds struct
feat(morello): add changes to enable TBBR boot
feat(morello): add DTS for Morello SoC platform
feat(morello): configure DMC-Bing mode
feat(morello): zero out the DDR memory space
feat(morello): add TARGET_PLATFORM flag
fix(morello): fix SoC reference clock frequency
fix(arm): use PLAT instead of TARGET_PLATFORM
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| #
6ad6465e |
| 18-Nov-2021 |
sah01 <sahil@arm.com> |
feat(morello): add support for nt_fw_config
This patch adds support to load nt_fw_config
with the information from plat_info sds
structure which is then passed from BL2 to BL33.
Signed-off-by: sah0
feat(morello): add support for nt_fw_config
This patch adds support to load nt_fw_config
with the information from plat_info sds
structure which is then passed from BL2 to BL33.
Signed-off-by: sah01 <sahil@arm.com>
Change-Id: I2242da7404c72a4f9c2e3d7f3b5c154890a78526
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| #
4af53977 |
| 10-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id
feat(morello): add changes to enable TBBR boot
This patch adds all SOC and FVP related changes required to boot
a standard TBBR style boot on Morello.
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ib8f7f326790b13082cbe8db21a980e048e3db88c
show more ...
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| #
572c8ce2 |
| 15-Sep-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add DTS for Morello SoC platform
Added Morello SoC specific DTS file.
Change-Id: I099e74ec95ed9e1b47f7d5a68b0dd1e251439e11
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-of
feat(morello): add DTS for Morello SoC platform
Added Morello SoC specific DTS file.
Change-Id: I099e74ec95ed9e1b47f7d5a68b0dd1e251439e11
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
show more ...
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| #
8840711f |
| 26-Aug-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add TARGET_PLATFORM flag
The same folder "plat/arm/board/morello" is going to be
used by both Morello FVP and Morello SoC platforms.
TARGET_PLATFORM build flag has been introduced to
feat(morello): add TARGET_PLATFORM flag
The same folder "plat/arm/board/morello" is going to be
used by both Morello FVP and Morello SoC platforms.
TARGET_PLATFORM build flag has been introduced to
differentiate between the two platforms
Change-Id: I3e94da372a3f1ba810b4259b85dd4c204306c359
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
show more ...
|
| #
8c7f156f |
| 05-Feb-2021 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge "rainier: remove cpu workaround for errata 1542419" into integration
|
| #
041d7c7b |
| 27-Jan-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
rainier: remove cpu workaround for errata 1542419
This patch removes the Neoverse N1 CPU errata workaround for
bug 1542419 as the bug is not present in Rainier R0P0 core.
Change-Id: Icaca299b13ef83
rainier: remove cpu workaround for errata 1542419
This patch removes the Neoverse N1 CPU errata workaround for
bug 1542419 as the bug is not present in Rainier R0P0 core.
Change-Id: Icaca299b13ef830b2ee5129576aae655a6288e69
Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com>
show more ...
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| #
14bac449 |
| 02-Oct-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "morello: Add changes to fix build of Morello Platform" into integration
|