xref: /rk3399_ARM-atf/bl32/sp_min/sp_min.ld.S (revision 7303319b3823e9e33748d963e9173f3678aba4da) 
1/*
2 * Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <common/bl_common.ld.h>
8#include <lib/per_cpu/per_cpu_defs.h>
9#include <lib/xlat_tables/xlat_tables_defs.h>
10
11OUTPUT_FORMAT(elf32-littlearm)
12OUTPUT_ARCH(arm)
13ENTRY(sp_min_vector_table)
14
15MEMORY {
16    RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
17}
18
19#ifdef PLAT_SP_MIN_EXTRA_LD_SCRIPT
20#   include <plat_sp_min.ld.S>
21#endif /* PLAT_SP_MIN_EXTRA_LD_SCRIPT */
22
23SECTIONS {
24    RAM_REGION_START = ORIGIN(RAM);
25    RAM_REGION_LENGTH = LENGTH(RAM);
26    . = BL32_BASE;
27
28    ASSERT(. == ALIGN(PAGE_SIZE),
29        "BL32_BASE address is not aligned on a page boundary.")
30
31#if SEPARATE_CODE_AND_RODATA
32    .text . : {
33        ASSERT(. == ALIGN(PAGE_SIZE),
34        ".text address is not aligned on a page boundary.");
35
36        __TEXT_START__ = .;
37
38        *entrypoint.o(.text*)
39        *(SORT_BY_ALIGNMENT(.text*))
40        *(.vectors)
41        __TEXT_END_UNALIGNED__ = .;
42
43        . = ALIGN(PAGE_SIZE);
44
45        __TEXT_END__ = .;
46    } >RAM
47
48    /* .ARM.extab and .ARM.exidx are only added because Clang needs them */
49    .ARM.extab . : {
50        *(.ARM.extab* .gnu.linkonce.armextab.*)
51    } >RAM
52
53    .ARM.exidx . : {
54        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
55    } >RAM
56
57    .rodata . : {
58        __RODATA_START__ = .;
59        *(SORT_BY_ALIGNMENT(.rodata*))
60
61        RODATA_COMMON
62
63        . = ALIGN(8);
64
65#   include <lib/el3_runtime/pubsub_events.h>
66        __RODATA_END_UNALIGNED__ = .;
67
68        . = ALIGN(PAGE_SIZE);
69
70        __RODATA_END__ = .;
71    } >RAM
72#else /* SEPARATE_CODE_AND_RODATA */
73    .ro . : {
74        ASSERT(. == ALIGN(PAGE_SIZE),
75        ".ro address is not aligned on a page boundary.");
76
77        __RO_START__ = .;
78
79        *entrypoint.o(.text*)
80        *(SORT_BY_ALIGNMENT(.text*))
81        *(SORT_BY_ALIGNMENT(.rodata*))
82
83        RODATA_COMMON
84
85        . = ALIGN(8);
86
87#   include <lib/el3_runtime/pubsub_events.h>
88
89        *(.vectors)
90
91        __RO_END_UNALIGNED__ = .;
92
93        /*
94         * Memory page(s) mapped to this section will be marked as device
95         * memory. No other unexpected data must creep in. Ensure that the rest
96         * of the current memory page is unused.
97         */
98        . = ALIGN(PAGE_SIZE);
99
100        __RO_END__ = .;
101    } >RAM
102#endif /* SEPARATE_CODE_AND_RODATA */
103
104    ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
105        "cpu_ops not defined for this platform.")
106
107    __RW_START__ = .;
108
109    DATA_SECTION >RAM
110    RELA_SECTION >RAM
111
112#ifdef BL32_PROGBITS_LIMIT
113    ASSERT(. <= BL32_PROGBITS_LIMIT, "BL32 progbits has exceeded its limit.")
114#endif /* BL32_PROGBITS_LIMIT */
115
116    STACK_SECTION >RAM
117    BSS_SECTION >RAM
118    PER_CPU >RAM
119    XLAT_TABLE_SECTION >RAM
120
121    __BSS_SIZE__ = SIZEOF(.bss);
122
123#if USE_COHERENT_MEM
124    /*
125     * The base address of the coherent memory section must be page-aligned to
126     * guarantee that the coherent data are stored on their own pages and are
127     * not mixed with normal data.  This is required to set up the correct
128     * memory attributes for the coherent data page tables.
129     */
130    .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
131        __COHERENT_RAM_START__ = .;
132
133        /*
134         * Bakery locks are stored in coherent memory. Each lock's data is
135         * contiguous and fully allocated by the compiler.
136         */
137        *(.bakery_lock)
138        *(.tzfw_coherent_mem)
139
140        __COHERENT_RAM_END_UNALIGNED__ = .;
141
142        /*
143         * Memory page(s) mapped to this section will be marked as device
144         * memory. No other unexpected data must creep in. Ensure that the rest
145         * of the current memory page is unused.
146         */
147        . = ALIGN(PAGE_SIZE);
148
149        __COHERENT_RAM_END__ = .;
150    } >RAM
151
152    __COHERENT_RAM_UNALIGNED_SIZE__ =
153        __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
154#endif /* USE_COHERENT_MEM */
155
156    __RW_END__ = .;
157    __BL32_END__ = .;
158
159    /DISCARD/ : {
160        *(.dynsym .dynstr .hash .gnu.hash)
161    }
162
163    ASSERT(. <= BL32_LIMIT, "BL32 image has exceeded its limit.")
164    RAM_REGION_END = .;
165}
166