| /rk3399_ARM-atf/plat/mediatek/drivers/cpu_pm/topology/group_4_3_1/ |
| H A D | pwr.c | 103 int ret = MTK_CPUPM_E_OK; in pwr_domain_coordination() local
106 ret = fn(state->pwr.afflv, state, &tp); in pwr_domain_coordination()
108 if (ret == MTK_CPUPM_E_OK) in pwr_domain_coordination()
|
| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/emi_mpu/ |
| H A D | emi_mpu.c | 29 int ret = 0; in emi_mpu_set_region_protection() local
108 ret = -1; in emi_mpu_set_region_protection()
112 return ret; in emi_mpu_set_region_protection()
|
| /rk3399_ARM-atf/plat/qti/msm8916/aarch64/ |
| H A D | uartdm_console.S | 103 ret
147 ret
178 ret
|
| /rk3399_ARM-atf/services/std_svc/trng/ |
| H A D | trng_entropy_pool.c | 68 bool ret = true; in trng_pack_entropy() local
73 ret = false; in trng_pack_entropy()
228 return ret; in trng_pack_entropy()
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a725.S | 44 ret
103 ret
122 ret
|
| H A D | cortex_a53.S | 25 ret
69 ret
105 ret
202 ret
|
| H A D | cortex_a720_ae.S | 58 ret
77 ret
|
| H A D | neoverse_n3.S | 64 ret
83 ret
|
| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | bl2_setup.c | 371 int ret = -1; in board_detect_fru() local
398 ret = fru_validate(fru_tbl, fru_area); in board_detect_fru()
399 if (ret < 0) { in board_detect_fru()
405 ret = fru_parse_ddr(fru_tbl, &fru_area[FRU_AREA_INTERNAL], in board_detect_fru()
407 if (ret < 0) { in board_detect_fru()
413 ret = fru_parse_board(fru_tbl, &fru_area[FRU_AREA_BOARD_INFO], in board_detect_fru()
415 if (ret < 0) { in board_detect_fru()
424 if (ret < 0) { in board_detect_fru()
|
| /rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046afrwy/ |
| H A D | ddr_init.c | 73 int ret; in ddr_board_options() local
76 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram)); in ddr_board_options()
77 if (ret != 0) { in ddr_board_options()
78 return ret; in ddr_board_options()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_setup.c | 292 int32_t ret; in plat_core_pos_by_mpidr() local
305 ret = -1; in plat_core_pos_by_mpidr()
312 ret = -1; in plat_core_pos_by_mpidr()
314 ret = (int32_t)pos; in plat_core_pos_by_mpidr()
318 return ret; in plat_core_pos_by_mpidr()
|
| /rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/ |
| H A D | nrd_ras_cpu.c | 152 int ret; in nrd_ras_cpu_intr_handler() local
194 ret = sdei_dispatch_event(ras_map->sdei_ev_num); in nrd_ras_cpu_intr_handler()
195 if (ret != 0) { in nrd_ras_cpu_intr_handler()
202 ERROR("SDEI dispatch failed: %d", ret); in nrd_ras_cpu_intr_handler()
207 return ret; in nrd_ras_cpu_intr_handler()
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/ |
| H A D | mt_spm_rc_vcore.c | 261 int ret = MT_RM_STATUS_OK; in spm_get_status_rc_vcore() local
269 ret = spm_rc_constraint_status_get(st->id, st->type, st->act, in spm_get_status_rc_vcore()
272 if (!ret && (st->id != MT_RM_CONSTRAINT_ID_ALL)) in spm_get_status_rc_vcore()
273 ret = MT_RM_STATUS_STOP; in spm_get_status_rc_vcore()
275 return ret; in spm_get_status_rc_vcore()
|
| /rk3399_ARM-atf/bl31/ |
| H A D | ehf.c | 406 int ret = 0; in ehf_el3_interrupt_handler() local
457 ret = handler(intr_raw, flags, handle, cookie); in ehf_el3_interrupt_handler()
459 return (uint64_t) ret; in ehf_el3_interrupt_handler()
468 int ret __unused; in ehf_init()
497 ret = register_interrupt_type_handler(INTR_TYPE_EL3, in ehf_init()
499 assert(ret == 0); in ehf_init()
|
| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | bl2_plat_setup.c | 153 int ret; in bl2_platform_setup() local
155 ret = stm32mp1_ddr_probe(); in bl2_platform_setup()
156 if (ret < 0) { in bl2_platform_setup()
157 ERROR("Invalid DDR init: error %d\n", ret); in bl2_platform_setup()
162 ret = mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in bl2_platform_setup()
164 if (ret < 0) { in bl2_platform_setup()
165 ERROR("DDR mapping: error %d\n", ret); in bl2_platform_setup()
|
| /rk3399_ARM-atf/plat/qti/common/src/aarch64/ |
| H A D | qti_helpers.S | 45 ret
80 ret x18
|
| /rk3399_ARM-atf/plat/nvidia/tegra/drivers/memctrl/ |
| H A D | memctrl_v1.c | 99 int ret; in tegra_clear_videomem() local
104 ret = mmap_add_dynamic_region(non_overlap_area_start, /* PA */ in tegra_clear_videomem()
109 assert(ret == 0); in tegra_clear_videomem()
|
| /rk3399_ARM-atf/plat/xilinx/versal/pm_service/ |
| H A D | pm_client.c | 216 uint32_t ret = UNDEFINED_CPUID; in pm_get_cpuid() local
221 ret = i; in pm_get_cpuid()
225 return ret; in pm_get_cpuid()
|
| /rk3399_ARM-atf/plat/nxp/soc-ls1028a/ls1028ardb/ |
| H A D | ddr_init.c | 75 int ret; in ddr_board_options() local
78 ret = cal_board_params(priv, ram, ARRAY_SIZE(ram)); in ddr_board_options()
79 if (ret != 0) { in ddr_board_options()
80 return ret; in ddr_board_options()
|
| /rk3399_ARM-atf/drivers/nxp/clk/s32cc/ |
| H A D | mc_me.c | 118 int ret; in mc_me_enable_partition() local
125 ret = mc_me_check_partition_nb_valid(part); in mc_me_enable_partition()
126 if (ret != 0) { in mc_me_enable_partition()
127 return ret; in mc_me_enable_partition()
|
| /rk3399_ARM-atf/plat/common/aarch64/ |
| H A D | crash_console_helpers.S | 92 ret x4
95 ret
150 ret
186 ret
|
| /rk3399_ARM-atf/plat/rockchip/common/scmi/ |
| H A D | rockchip_common_clock.c | 28 long ret; \
31 ret = (__x < 0) ? -__x : __x; \
34 ret = (__x < 0) ? -__x : __x; \
36 ret; \
|
| /rk3399_ARM-atf/plat/intel/soc/common/soc/ |
| H A D | socfpga_mailbox.c | 112 int ret = wait_for_mailbox_cmdbuf_empty(*cin); in write_mailbox_cmd_buffer() local
113 return ret; in write_mailbox_cmd_buffer()
129 int ret; in fill_mailbox_circular_buffer() local
140 ret = write_mailbox_cmd_buffer(&cmd_free_offset, sdm_read_offset, in fill_mailbox_circular_buffer()
142 if (ret != 0) { in fill_mailbox_circular_buffer()
149 ret = write_mailbox_cmd_buffer(&cmd_free_offset, in fill_mailbox_circular_buffer()
152 if (ret != 0) { in fill_mailbox_circular_buffer()
171 ret = mailbox_init(); in fill_mailbox_circular_buffer()
173 if (ret == MBOX_TIMEOUT) { in fill_mailbox_circular_buffer()
637 int ret; in mailbox_rsu_status() local
[all …]
|
| /rk3399_ARM-atf/plat/hisilicon/poplar/aarch64/ |
| H A D | poplar_helpers.S | 38 ret
86 ret
|
| /rk3399_ARM-atf/services/spd/pncd/ |
| H A D | pncd_private.h | 71 void __dead2 pncd_exit_sp(uint64_t c_rt_ctx, uint64_t ret);
73 void __dead2 pncd_synchronous_sp_exit(pnc_context_t *pnc_ctx, uint64_t ret);
|