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/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip-inno-hdmi-phy.c1143 int i, j; in inno_hdmi_update_phy_table() local
1145 for (i = 0; i < phy_table_size; i++) { in inno_hdmi_update_phy_table()
1146 phy_cfg[i].tmdsclock = in inno_hdmi_update_phy_table()
1147 (unsigned long)config[i * 15]; in inno_hdmi_update_phy_table()
1149 debug("%ld ", phy_cfg[i].tmdsclock); in inno_hdmi_update_phy_table()
1151 phy_cfg[i].regs[j] = (u8)config[i * 15 + 1 + j]; in inno_hdmi_update_phy_table()
1152 debug("0x%02x ", phy_cfg[i].regs[j]); in inno_hdmi_update_phy_table()
1161 phy_cfg[i].tmdsclock = ~0UL; in inno_hdmi_update_phy_table()
1163 phy_cfg[i].regs[j] = 0; in inno_hdmi_update_phy_table()
1233 int i; in inno_hdmi_phy_init() local
[all …]
/rk3399_rockchip-uboot/drivers/ata/
H A Dfsl_sata.c42 unsigned long i; in sdelay() local
43 for (i = 0; i < sec; i++) in sdelay()
69 int i; in ata_wait_register() local
72 for (i = 0; (((temp = in_le32(addr)) & mask) != val) in ata_wait_register()
73 && i < timeout_msec; i++) in ata_wait_register()
75 return (i < timeout_msec) ? 0 : -1; in ata_wait_register()
86 int i; in init_sata() local
153 for (i = 0; i < SATA_HC_MAX_CMD; i++) { in init_sata()
154 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i) in init_sata()
156 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda); in init_sata()
[all …]
/rk3399_rockchip-uboot/doc/
H A DREADME.menu96 int i;
101 for(i = 0; tools[i]; i++) {
102 if (menu_item_add(m, tools[i], tools[i]) != 1) {
H A DREADME.mxsimage1 Freescale i.MX233/i.MX28 SB image generator via mkimage
5 Such a BootStream is then bootable on i.MX23/i.MX28.
20 mxsimage.mx23.cfg -- This is an example configuration for i.MX23
21 mxsimage.mx28.cfg -- This is an example configuration for i.MX28
62 - i.MX28-specific instruction!
67 - i.MX28-specific instruction!
79 optional "HAB" flag is i.MX28-specific flag turning on the HAB boot.
91 i.MX23, string_mode = USB/I2C/SPI1_FLASH/SPI2_FLASH/NAND_BCH
93 i.MX28, string_mode = USB/I2C/SPI2_FLASH/SPI3_FLASH/NAND_BCH
97 file. Note that the DCD is only supported on i.MX28.
/rk3399_rockchip-uboot/drivers/ddr/marvell/axp/
H A Dxor.c114 u32 i; in mv_xor_hal_init() local
117 for (i = 0; i < chan_num; i++) { in mv_xor_hal_init()
118 mv_xor_cmd_set(i, MV_STOP); in mv_xor_hal_init()
119 mv_xor_ctrl_set(i, (1 << XEXCR_REG_ACC_PROTECT_OFFS) | in mv_xor_hal_init()
/rk3399_rockchip-uboot/arch/x86/cpu/quark/
H A DKconfig89 ACPI Power Managment 1 (PM1) i/o-mapped base address.
96 ACPI Processor Block (PBLK) i/o-mapped base address.
103 SPI DMA i/o-mapped base address.
109 GPIO i/o-mapped base address.
115 ACPI General Purpose Event 0 (GPE0) i/o-mapped base address.
122 Watchdog timer i/o-mapped base address.
/rk3399_rockchip-uboot/board/freescale/ls2080ardb/
H A Dls2080ardb.c397 int i, nr_of_cfgsw; in qixis_dump_switch() local
403 for (i = 1; i <= nr_of_cfgsw; i++) { in qixis_dump_switch()
404 QIXIS_WRITE(cms[0], i); in qixis_dump_switch()
405 printf("SW%d = (0x%02x)\n", i, QIXIS_READ(cms[1])); in qixis_dump_switch()
/rk3399_rockchip-uboot/board/freescale/mx53ard/
H A Dmx53ard.c84 u32 i, reg; in setup_iomux_nand() local
89 for (i = 0x4; i < 0x94; i += 0x18) { in setup_iomux_nand()
90 reg = __raw_readl(WEIM_BASE_ADDR + i); in setup_iomux_nand()
92 __raw_writel(reg, WEIM_BASE_ADDR + i); in setup_iomux_nand()
/rk3399_rockchip-uboot/common/
H A Dbootm.c70 int i; in boot_start_lmb() local
72 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { in boot_start_lmb()
73 lmb_add(&images->lmb, gd->bd->bi_dram[i].start, in boot_start_lmb()
74 gd->bd->bi_dram[i].size); in boot_start_lmb()
1069 int i; in bootm_host_load_images() local
1071 for (i = 0; !is_spl && i < ARRAY_SIZE(image_types); i++) { in bootm_host_load_images()
1074 ret = bootm_host_load_image(fit, image_types[i], 0); in bootm_host_load_images()
1079 for (i = 0; is_spl && i < ARRAY_SIZE(image_types_spl); i++) { in bootm_host_load_images()
1082 if (image_types_spl[i] == IH_TYPE_LOADABLE) in bootm_host_load_images()
1087 ret = bootm_host_load_image(fit, image_types_spl[i], index); in bootm_host_load_images()
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dtegra_nand.c120 int i; in nand_waitfor_cmd_completion() local
122 for (i = 0; i < NAND_CMD_TIMEOUT_MS * 1000; i++) { in nand_waitfor_cmd_completion()
180 int i, s; in read_buf() local
185 for (i = 0; i < len; i += 4) { in read_buf()
186 s = (len - i) > 4 ? 4 : len - i; in read_buf()
193 memcpy(buf + i, &reg, s); in read_buf()
365 int i; in blank_check() local
367 for (i = 0; i < len; i++) in blank_check()
368 if (buf[i] != 0xFF) in blank_check()
/rk3399_rockchip-uboot/drivers/usb/eth/
H A Dasix88179.c639 int i; in ax88179_eth_probe() local
645 for (i = 0; asix_dongles[i].vendor != 0; i++) { in ax88179_eth_probe()
646 if (dev->descriptor.idVendor == asix_dongles[i].vendor && in ax88179_eth_probe()
647 dev->descriptor.idProduct == asix_dongles[i].product) in ax88179_eth_probe()
652 if (asix_dongles[i].vendor == 0) in ax88179_eth_probe()
672 dev_priv->flags = asix_dongles[i].flags; in ax88179_eth_probe()
678 for (i = 0; i < iface_desc->bNumEndpoints; i++) { in ax88179_eth_probe()
680 if ((iface->ep_desc[i].bmAttributes & in ax88179_eth_probe()
682 ss->ep_int = iface->ep_desc[i].bEndpointAddress & in ax88179_eth_probe()
684 ss->irqinterval = iface->ep_desc[i].bInterval; in ax88179_eth_probe()
[all …]
/rk3399_rockchip-uboot/board/isee/igep00x0/
H A Digep00x0.c199 int i = get_board_revision(); in set_boardname() local
201 rev[i+1] = 0; in set_boardname()
202 env_set("board_rev", rev + i); in set_boardname()
203 env_set("board_name", i < 2 ? "igep0020" : "igep0030"); in set_boardname()
/rk3399_rockchip-uboot/board/freescale/ls1043ardb/
H A Dcpld.c124 int i; in cpld_rev_bit() local
128 for (i = 1; i <= 7; i++) { in cpld_rev_bit()
/rk3399_rockchip-uboot/doc/device-tree-bindings/clock/
H A Drockchip,rk3368-dmc.txt5 during TPL using configuration data from the DTS (i.e. OF_PLATDATA), based on
7 (a) a target-frequency (i.e. operating point) for the memory operation
9 (c) a memory-schedule (i.e. mapping from physical addresses to the address
45 controls the decoding of physical addresses to DRAM addressing (i.e. how
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_gvi.c216 int i = 0; in rk628_gvi_enable() local
240 for (i = 0; i < 100; i++) { in rk628_gvi_enable()
247 if (i == 100 && gvi->retry_times < GVI_RETRY_TIMEOUT) { in rk628_gvi_enable()
255 if (gvi->retry_times >= GVI_RETRY_TIMEOUT && i == 100) { in rk628_gvi_enable()
261 if (i != 100) in rk628_gvi_enable()
/rk3399_rockchip-uboot/board/toradex/colibri_imx7/
H A Dcolibri_imx7.c222 int i, ret; in board_mmc_init() local
224 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { in board_mmc_init()
225 switch (i) { in board_mmc_init()
235 "(%d) than supported by the board\n", i + 1); in board_mmc_init()
239 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
/rk3399_rockchip-uboot/drivers/net/
H A Dsmc911x.h429 unsigned long val, i; in smc911x_detect_chip() local
441 for (i = 0; chip_ids[i].id != 0; i++) { in smc911x_detect_chip()
442 if (chip_ids[i].id == val) break; in smc911x_detect_chip()
444 if (!chip_ids[i].id) { in smc911x_detect_chip()
449 dev->priv = (void *)&chip_ids[i]; in smc911x_detect_chip()
H A Dsh_eth.c159 int ret = 0, i; in sh_eth_reset() local
166 for (i = 0; i < TIMEOUT_CNT; i++) { in sh_eth_reset()
172 if (i == TIMEOUT_CNT) { in sh_eth_reset()
189 int port = eth->port, i, ret = 0; in sh_eth_tx_desc_init() local
214 for (cur_tx_desc = port_info->tx_desc_base, i = 0; i < NUM_TX_DESC; in sh_eth_tx_desc_init()
215 cur_tx_desc++, i++) { in sh_eth_tx_desc_init()
240 int port = eth->port, i , ret = 0; in sh_eth_rx_desc_init() local
282 rx_buf = port_info->rx_buf_base, i = 0; in sh_eth_rx_desc_init()
283 i < NUM_RX_DESC; cur_rx_desc++, rx_buf += MAX_BUF_SIZE, i++) { in sh_eth_rx_desc_init()
H A Dftmac100.c81 int i; in _ftmac100_init() local
102 for (i = 0; i < PKTBUFSRX; i++) { in _ftmac100_init()
104 rxdes[i].rxdes2 = (unsigned int)net_rx_packets[i]; in _ftmac100_init()
105 rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE (PKTSIZE_ALIGN); in _ftmac100_init()
106 rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; in _ftmac100_init()
/rk3399_rockchip-uboot/fs/ubifs/
H A Dlog.c356 int err, i, max_len, len; in ubifs_log_start_commit() local
380 for (i = 0; i < c->jhead_cnt; i++) { in ubifs_log_start_commit()
381 int lnum = c->jheads[i].wbuf.lnum; in ubifs_log_start_commit()
382 int offs = c->jheads[i].wbuf.offs; in ubifs_log_start_commit()
388 lnum, offs, dbg_jhead(i)); in ubifs_log_start_commit()
393 ref->jhead = cpu_to_le32(i); in ubifs_log_start_commit()
725 int i, err = 0; in dbg_check_bud_bytes() local
733 for (i = 0; i < c->jhead_cnt; i++) in dbg_check_bud_bytes()
734 list_for_each_entry(bud, &c->jheads[i].buds_list, list) in dbg_check_bud_bytes()
/rk3399_rockchip-uboot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c295 int i; in board_mmc_init() local
304 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { in board_mmc_init()
305 switch (i) { in board_mmc_init()
323 i + 1, CONFIG_SYS_FSL_USDHC_NUM); in board_mmc_init()
327 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
1020 int i; in ddr_init() local
1022 for (i = 0; i < size / 2 ; i++) in ddr_init()
1023 writel(table[2 * i + 1], table[2 * i]); in ddr_init()
/rk3399_rockchip-uboot/board/engicam/icorem6/
H A DREADME1 How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and Quad/Dual Starter Kit:
6 - Configure U-Boot for Engicam i.CoreM6 Quad/Dual:
9 - Configure U-Boot for Engicam i.CoreM6 Solo/DualLite:
/rk3399_rockchip-uboot/fs/reiserfs/
H A Dreiserfs_private.h458 #define CACHE(i) (ROOT + ((i) << INFO->fullblocksize_shift)) argument
491 int i; in log2()
493 for(i=0; i<(8*sizeof(word)); i++) in log2()
494 if ((1<<i) & word) in log2()
495 return i; in log2()
/rk3399_rockchip-uboot/drivers/usb/gadget/
H A Dfotg210.c104 uint32_t i; in fotg210_reset() local
153 for (i = 0; i < 8; ++i) { in fotg210_reset()
154 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]); in fotg210_reset()
155 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]); in fotg210_reset()
159 for (i = 0; i < 4; ++i) { in fotg210_reset()
160 writel(FIFOCSR_RESET, &regs->fifocsr[i]); in fotg210_reset()
162 if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) { in fotg210_reset()
163 printf("fotg210: fifo%d reset failed\n", i); in fotg210_reset()
914 int i, ret = 0; in usb_gadget_register_driver() local
923 for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) { in usb_gadget_register_driver()
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/rk3399_rockchip-uboot/scripts/dtc/pylibfdt/
H A DMakefile14 $(obj)/libfdt.i
30 clean-files += libfdt.i _libfdt.so libfdt.py libfdt_wrap.c

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