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/OK3568_Linux_fs/kernel/drivers/char/agp/
H A Dintel-agp.c832 #define ID(x) \ macro
841 ID(PCI_DEVICE_ID_INTEL_82441), /* for HAS2 support */
842 ID(PCI_DEVICE_ID_INTEL_82443LX_0),
843 ID(PCI_DEVICE_ID_INTEL_82443BX_0),
844 ID(PCI_DEVICE_ID_INTEL_82443GX_0),
845 ID(PCI_DEVICE_ID_INTEL_82810_MC1),
846 ID(PCI_DEVICE_ID_INTEL_82810_MC3),
847 ID(PCI_DEVICE_ID_INTEL_82810E_MC),
848 ID(PCI_DEVICE_ID_INTEL_82815_MC),
849 ID(PCI_DEVICE_ID_INTEL_82820_HB),
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/media/atomisp/pci/hive_isp_css_include/host/
H A Dmmu_public.h31 const mmu_ID_t ID,
42 const mmu_ID_t ID);
51 const mmu_ID_t ID);
68 const mmu_ID_t ID, in mmu_reg_store() argument
72 assert(ID < N_MMU_ID); in mmu_reg_store()
73 assert(MMU_BASE[ID] != (hrt_address) - 1); in mmu_reg_store()
74 ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value); in mmu_reg_store()
87 const mmu_ID_t ID, in mmu_reg_load() argument
90 assert(ID < N_MMU_ID); in mmu_reg_load()
91 assert(MMU_BASE[ID] != (hrt_address) - 1); in mmu_reg_load()
[all …]
H A Dcsi_rx_public.h33 const csi_rx_frontend_ID_t ID,
43 const csi_rx_frontend_ID_t ID,
54 const csi_rx_frontend_ID_t ID,
65 const csi_rx_backend_ID_t ID,
75 const csi_rx_backend_ID_t ID,
94 const csi_rx_frontend_ID_t ID,
106 const csi_rx_frontend_ID_t ID,
119 const csi_rx_backend_ID_t ID,
131 const csi_rx_backend_ID_t ID,
H A Dirq_public.h29 void irq_controller_get_state(const irq_ID_t ID,
41 const irq_ID_t ID,
54 const irq_ID_t ID,
65 const irq_ID_t ID,
76 const irq_ID_t ID,
87 const irq_ID_t ID,
97 const irq_ID_t ID);
111 const irq_ID_t ID,
122 const irq_ID_t ID,
H A Dinput_formatter_public.h29 const input_formatter_ID_t ID);
46 const input_formatter_ID_t ID,
56 const input_formatter_ID_t ID);
66 const input_formatter_ID_t ID,
77 const input_formatter_ID_t ID,
88 const input_formatter_ID_t ID,
100 const input_formatter_ID_t ID,
113 const input_formatter_ID_t ID,
H A Dfifo_monitor_public.h34 const fifo_monitor_ID_t ID,
46 const fifo_monitor_ID_t ID,
57 const fifo_monitor_ID_t ID,
69 const fifo_monitor_ID_t ID,
82 const fifo_monitor_ID_t ID,
95 const fifo_monitor_ID_t ID,
108 const fifo_monitor_ID_t ID,
H A Devent_fifo_public.h29 const event_ID_t ID);
39 const event_ID_t ID,
49 const event_ID_t ID);
59 const event_ID_t ID,
69 const event_ID_t ID);
78 const event_ID_t ID);
H A Disys_stream2mmio_public.h32 const stream2mmio_ID_t ID,
44 const stream2mmio_ID_t ID,
65 const stream2mmio_ID_t ID,
85 const stream2mmio_ID_t ID,
97 const stream2mmio_ID_t ID,
/OK3568_Linux_fs/kernel/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
H A Dgdc.c27 const gdc_ID_t ID,
32 const gdc_ID_t ID,
43 const gdc_ID_t ID, in gdc_lut_store() argument
48 assert(ID < N_GDC_ID); in gdc_lut_store()
62 gdc_reg_store(ID, lut_offset++, word_0); in gdc_lut_store()
63 gdc_reg_store(ID, lut_offset++, word_1); in gdc_lut_store()
102 const gdc_ID_t ID) in gdc_get_unity() argument
104 assert(ID < N_GDC_ID); in gdc_get_unity()
105 (void)ID; in gdc_get_unity()
113 const gdc_ID_t ID, in gdc_reg_store() argument
[all …]
H A Dtimed_ctrl.c25 const timed_ctrl_ID_t ID, in timed_ctrl_snd_commnd() argument
32 OP___assert(ID == TIMED_CTRL0_ID); in timed_ctrl_snd_commnd()
33 OP___assert(TIMED_CTRL_BASE[ID] != (hrt_address)-1); in timed_ctrl_snd_commnd()
35 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, mask); in timed_ctrl_snd_commnd()
36 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, condition); in timed_ctrl_snd_commnd()
37 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, counter); in timed_ctrl_snd_commnd()
38 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, (hrt_data)addr); in timed_ctrl_snd_commnd()
39 timed_ctrl_reg_store(ID, _HRT_TIMED_CONTROLLER_CMD_REG_IDX, value); in timed_ctrl_snd_commnd()
46 const timed_ctrl_ID_t ID, in timed_ctrl_snd_sp_commnd() argument
57 timed_ctrl_snd_commnd(ID, mask, condition, counter, in timed_ctrl_snd_sp_commnd()
[all …]
H A Dvmem.c135 const isp_ID_t ID, in load_vector() argument
144 assert(ISP_BAMEM_BASE[ID] != (hrt_address) - 1); in load_vector()
146 ia_css_device_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); in load_vector()
148 hrt_master_port_load(ISP_BAMEM_BASE[ID] + (unsigned long)from, &v[0][0], size); in load_vector()
161 const isp_ID_t ID, in store_vector() argument
175 assert(ISP_BAMEM_BASE[ID] != (hrt_address) - 1); in store_vector()
177 ia_css_device_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); in store_vector()
180 hrt_master_port_store(ISP_BAMEM_BASE[ID] + (unsigned long)to, &v, size); in store_vector()
186 const isp_ID_t ID, in isp_vmem_load() argument
194 assert(ID < N_ISP_ID); in isp_vmem_load()
[all …]
H A Dirq_private.h26 const irq_ID_t ID, in irq_reg_store() argument
30 assert(ID < N_IRQ_ID); in irq_reg_store()
31 assert(IRQ_BASE[ID] != (hrt_address) - 1); in irq_reg_store()
32 ia_css_device_store_uint32(IRQ_BASE[ID] + reg * sizeof(hrt_data), value); in irq_reg_store()
37 const irq_ID_t ID, in irq_reg_load() argument
40 assert(ID < N_IRQ_ID); in irq_reg_load()
41 assert(IRQ_BASE[ID] != (hrt_address) - 1); in irq_reg_load()
42 return ia_css_device_load_uint32(IRQ_BASE[ID] + reg * sizeof(hrt_data)); in irq_reg_load()
H A Dgpio_private.h26 const gpio_ID_t ID, in gpio_reg_store() argument
30 OP___assert(ID < N_GPIO_ID); in gpio_reg_store()
31 OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); in gpio_reg_store()
32 ia_css_device_store_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data), value); in gpio_reg_store()
37 const gpio_ID_t ID, in gpio_reg_load() argument
40 OP___assert(ID < N_GPIO_ID); in gpio_reg_load()
41 OP___assert(GPIO_BASE[ID] != (hrt_address) - 1); in gpio_reg_load()
42 return ia_css_device_load_uint32(GPIO_BASE[ID] + reg * sizeof(hrt_data)); in gpio_reg_load()
H A Ddma_private.h25 STORAGE_CLASS_DMA_C void dma_reg_store(const dma_ID_t ID, in dma_reg_store() argument
29 assert(ID < N_DMA_ID); in dma_reg_store()
30 assert(DMA_BASE[ID] != (hrt_address) - 1); in dma_reg_store()
31 ia_css_device_store_uint32(DMA_BASE[ID] + reg * sizeof(hrt_data), value); in dma_reg_store()
34 STORAGE_CLASS_DMA_C hrt_data dma_reg_load(const dma_ID_t ID, in dma_reg_load() argument
37 assert(ID < N_DMA_ID); in dma_reg_load()
38 assert(DMA_BASE[ID] != (hrt_address) - 1); in dma_reg_load()
39 return ia_css_device_load_uint32(DMA_BASE[ID] + reg * sizeof(hrt_data)); in dma_reg_load()
H A Dinput_formatter_private.h26 const input_formatter_ID_t ID, in input_formatter_reg_store() argument
30 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_reg_store()
31 assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); in input_formatter_reg_store()
33 ia_css_device_store_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr, value); in input_formatter_reg_store()
38 const input_formatter_ID_t ID, in input_formatter_reg_load() argument
41 assert(ID < N_INPUT_FORMATTER_ID); in input_formatter_reg_load()
42 assert(INPUT_FORMATTER_BASE[ID] != (hrt_address)-1); in input_formatter_reg_load()
44 return ia_css_device_load_uint32(INPUT_FORMATTER_BASE[ID] + reg_addr); in input_formatter_reg_load()
H A Dgp_device_private.h26 const gp_device_ID_t ID, in gp_device_reg_store() argument
30 assert(ID < N_GP_DEVICE_ID); in gp_device_reg_store()
31 assert(GP_DEVICE_BASE[ID] != (hrt_address) - 1); in gp_device_reg_store()
33 ia_css_device_store_uint32(GP_DEVICE_BASE[ID] + reg_addr, value); in gp_device_reg_store()
38 const gp_device_ID_t ID, in gp_device_reg_load() argument
41 assert(ID < N_GP_DEVICE_ID); in gp_device_reg_load()
42 assert(GP_DEVICE_BASE[ID] != (hrt_address)-1); in gp_device_reg_load()
44 return ia_css_device_load_uint32(GP_DEVICE_BASE[ID] + reg_addr); in gp_device_reg_load()
H A Dmmu.c20 const mmu_ID_t ID, in mmu_set_page_table_base_index() argument
23 mmu_reg_store(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX, base_index); in mmu_set_page_table_base_index()
28 const mmu_ID_t ID) in mmu_get_page_table_base_index() argument
30 return mmu_reg_load(ID, _HRT_MMU_PAGE_TABLE_BASE_ADDRESS_REG_IDX); in mmu_get_page_table_base_index()
34 const mmu_ID_t ID) in mmu_invalidate_cache() argument
36 mmu_reg_store(ID, _HRT_MMU_INVALIDATE_TLB_REG_IDX, 1); in mmu_invalidate_cache()
H A Dgp_timer.c49 void gp_timer_init(gp_timer_ID_t ID) in gp_timer_init() argument
55 gp_timer_reg_store(_REG_GP_TIMER_ENABLE_ID(ID), 1); in gp_timer_init()
58 gp_timer_reg_store(_REG_GP_TIMER_SIGNAL_SELECT_ID(ID), GP_TIMER_SIGNAL_SELECT); in gp_timer_init()
61 gp_timer_reg_store(_REG_GP_TIMER_COUNT_TYPE_ID(ID), GP_TIMER_COUNT_TYPE_LOW); in gp_timer_init()
68 gp_timer_read(gp_timer_ID_t ID) in gp_timer_read() argument
70 return gp_timer_reg_load(_REG_GP_TIMER_VALUE_ID(ID)); in gp_timer_read()
/OK3568_Linux_fs/kernel/drivers/staging/media/atomisp/pci/
H A Disp2400_input_system_public.h35 const input_system_ID_t ID,
46 const rx_ID_t ID,
72 const rx_ID_t ID,
86 const rx_ID_t ID,
98 const rx_ID_t ID,
110 const rx_ID_t ID,
122 const rx_ID_t ID,
134 const rx_ID_t ID,
147 const input_system_ID_t ID,
160 const input_system_ID_t ID,
[all …]
/OK3568_Linux_fs/u-boot/drivers/gpio/
H A Dsunxi_gpio.c341 #define ID(_compat_, _soc_data_) \ macro
345 ID("allwinner,sun4i-a10-pinctrl", a_all),
346 ID("allwinner,sun5i-a10s-pinctrl", a_all),
347 ID("allwinner,sun5i-a13-pinctrl", a_all),
348 ID("allwinner,sun6i-a31-pinctrl", a_all),
349 ID("allwinner,sun6i-a31s-pinctrl", a_all),
350 ID("allwinner,sun7i-a20-pinctrl", a_all),
351 ID("allwinner,sun8i-a23-pinctrl", a_all),
352 ID("allwinner,sun8i-a33-pinctrl", a_all),
353 ID("allwinner,sun8i-a83t-pinctrl", a_all),
[all …]
/OK3568_Linux_fs/buildroot/dl/qt5location/git/src/3rdparty/mapbox-gl-native/deps/boost/1.65.1/include/boost/typeof/msvc/
H A Dtypeof_impl.hpp89 template<typename ID, typename T = msvc_extract_type_default_param>
92 template<typename ID>
93 struct msvc_extract_type<ID, msvc_extract_type_default_param> {
100 template<typename ID, typename T>
101 struct msvc_extract_type : msvc_extract_type<ID,msvc_extract_type_default_param>
114 template<typename T, typename ID>
115 struct msvc_register_type : msvc_extract_type<ID, T>
119 template<typename ID>
125 template<typename T, typename ID>
126 struct msvc_register_type : msvc_extract_type<ID>
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/aic7xxx/
H A Daic79xx_osm_pci.c48 #define ID(x) \ macro
54 ID(ID_AHA_29320A),
55 ID(ID_AHA_29320ALP),
56 ID(ID_AHA_29320LPE),
58 ID(ID_AHA_29320),
59 ID(ID_AHA_29320B),
60 ID(ID_AHA_29320LP),
61 ID(ID_AHA_39320),
62 ID(ID_AHA_39320_B),
63 ID(ID_AHA_39320A),
[all …]
/OK3568_Linux_fs/kernel/Documentation/pcmcia/
H A Ddevicetable.rst8 - manufactor ID
9 - card ID
10 - product ID strings _and_ hashes of these strings
11 - function ID
17 If you want to match product ID strings, you also need to pass the crc32
18 hashes of the string to the macro, e.g. if you want to match the product ID
26 You can determine the hash of the product ID strings by catting the file
31 The hex value after "pa" is the hash of product ID string 1, after "pb" for
/OK3568_Linux_fs/kernel/tools/perf/util/
H A Dstat.c86 #define ID(id, name) [PERF_STAT_EVSEL_ID__##id] = #name macro
88 ID(NONE, x),
89 ID(CYCLES_IN_TX, cpu/cycles-t/),
90 ID(TRANSACTION_START, cpu/tx-start/),
91 ID(ELISION_START, cpu/el-start/),
92 ID(CYCLES_IN_TX_CP, cpu/cycles-ct/),
93 ID(TOPDOWN_TOTAL_SLOTS, topdown-total-slots),
94 ID(TOPDOWN_SLOTS_ISSUED, topdown-slots-issued),
95 ID(TOPDOWN_SLOTS_RETIRED, topdown-slots-retired),
96 ID(TOPDOWN_FETCH_BUBBLES, topdown-fetch-bubbles),
[all …]
/OK3568_Linux_fs/kernel/Documentation/hwmon/
H A Docc.rst32 The OCC sensor ID is an integer that represents the unique identifier of the
34 DIMM slot in the system may have a sensor ID of 7. This mapping is unavailable
35 to the device driver, which must therefore export the sensor ID as-is.
42 OCC sensor ID.
74 OCC sensor ID.
89 OCC sensor ID.
94 OCC sensor ID + function ID + channel in the form
96 Both the function ID and channel are integers that
102 OCC sensor ID + sensor type in the form of a string,
105 For this sensor version, OCC sensor ID will be the same
[all …]

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