xref: /OK3568_Linux_fs/u-boot/drivers/gpio/sunxi_gpio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * (C) Copyright 2007-2011
7*4882a593Smuzhiyun  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8*4882a593Smuzhiyun  * Tom Cubie <tangliang@allwinnertech.com>
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
11*4882a593Smuzhiyun  */
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #include <common.h>
14*4882a593Smuzhiyun #include <dm.h>
15*4882a593Smuzhiyun #include <errno.h>
16*4882a593Smuzhiyun #include <fdtdec.h>
17*4882a593Smuzhiyun #include <malloc.h>
18*4882a593Smuzhiyun #include <asm/arch/gpio.h>
19*4882a593Smuzhiyun #include <asm/io.h>
20*4882a593Smuzhiyun #include <asm/gpio.h>
21*4882a593Smuzhiyun #include <dm/device-internal.h>
22*4882a593Smuzhiyun #include <dt-bindings/gpio/gpio.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define SUNXI_GPIOS_PER_BANK	SUNXI_GPIO_A_NR
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun struct sunxi_gpio_platdata {
29*4882a593Smuzhiyun 	struct sunxi_gpio *regs;
30*4882a593Smuzhiyun 	const char *bank_name;	/* Name of bank, e.g. "B" */
31*4882a593Smuzhiyun 	int gpio_count;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #ifndef CONFIG_DM_GPIO
sunxi_gpio_output(u32 pin,u32 val)35*4882a593Smuzhiyun static int sunxi_gpio_output(u32 pin, u32 val)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	u32 dat;
38*4882a593Smuzhiyun 	u32 bank = GPIO_BANK(pin);
39*4882a593Smuzhiyun 	u32 num = GPIO_NUM(pin);
40*4882a593Smuzhiyun 	struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	dat = readl(&pio->dat);
43*4882a593Smuzhiyun 	if (val)
44*4882a593Smuzhiyun 		dat |= 0x1 << num;
45*4882a593Smuzhiyun 	else
46*4882a593Smuzhiyun 		dat &= ~(0x1 << num);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	writel(dat, &pio->dat);
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	return 0;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
sunxi_gpio_input(u32 pin)53*4882a593Smuzhiyun static int sunxi_gpio_input(u32 pin)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun 	u32 dat;
56*4882a593Smuzhiyun 	u32 bank = GPIO_BANK(pin);
57*4882a593Smuzhiyun 	u32 num = GPIO_NUM(pin);
58*4882a593Smuzhiyun 	struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	dat = readl(&pio->dat);
61*4882a593Smuzhiyun 	dat >>= num;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	return dat & 0x1;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
gpio_request(unsigned gpio,const char * label)66*4882a593Smuzhiyun int gpio_request(unsigned gpio, const char *label)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun 	return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
gpio_free(unsigned gpio)71*4882a593Smuzhiyun int gpio_free(unsigned gpio)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	return 0;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
gpio_direction_input(unsigned gpio)76*4882a593Smuzhiyun int gpio_direction_input(unsigned gpio)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun 	sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	return 0;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun 
gpio_direction_output(unsigned gpio,int value)83*4882a593Smuzhiyun int gpio_direction_output(unsigned gpio, int value)
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun 	sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	return sunxi_gpio_output(gpio, value);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun 
gpio_get_value(unsigned gpio)90*4882a593Smuzhiyun int gpio_get_value(unsigned gpio)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	return sunxi_gpio_input(gpio);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun 
gpio_set_value(unsigned gpio,int value)95*4882a593Smuzhiyun int gpio_set_value(unsigned gpio, int value)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	return sunxi_gpio_output(gpio, value);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
sunxi_name_to_gpio(const char * name)100*4882a593Smuzhiyun int sunxi_name_to_gpio(const char *name)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	int group = 0;
103*4882a593Smuzhiyun 	int groupsize = 9 * 32;
104*4882a593Smuzhiyun 	long pin;
105*4882a593Smuzhiyun 	char *eptr;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	if (*name == 'P' || *name == 'p')
108*4882a593Smuzhiyun 		name++;
109*4882a593Smuzhiyun 	if (*name >= 'A') {
110*4882a593Smuzhiyun 		group = *name - (*name > 'a' ? 'a' : 'A');
111*4882a593Smuzhiyun 		groupsize = 32;
112*4882a593Smuzhiyun 		name++;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	pin = simple_strtol(name, &eptr, 10);
116*4882a593Smuzhiyun 	if (!*name || *eptr)
117*4882a593Smuzhiyun 		return -1;
118*4882a593Smuzhiyun 	if (pin < 0 || pin > groupsize || group >= 9)
119*4882a593Smuzhiyun 		return -1;
120*4882a593Smuzhiyun 	return group * 32 + pin;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun #endif
123*4882a593Smuzhiyun 
sunxi_name_to_gpio_bank(const char * name)124*4882a593Smuzhiyun int sunxi_name_to_gpio_bank(const char *name)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun 	int group = 0;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	if (*name == 'P' || *name == 'p')
129*4882a593Smuzhiyun 		name++;
130*4882a593Smuzhiyun 	if (*name >= 'A') {
131*4882a593Smuzhiyun 		group = *name - (*name > 'a' ? 'a' : 'A');
132*4882a593Smuzhiyun 		return group;
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	return -1;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun #ifdef CONFIG_DM_GPIO
139*4882a593Smuzhiyun /* TODO(sjg@chromium.org): Remove this function and use device tree */
sunxi_name_to_gpio(const char * name)140*4882a593Smuzhiyun int sunxi_name_to_gpio(const char *name)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	unsigned int gpio;
143*4882a593Smuzhiyun 	int ret;
144*4882a593Smuzhiyun #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
145*4882a593Smuzhiyun 	char lookup[8];
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
148*4882a593Smuzhiyun 		sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
149*4882a593Smuzhiyun 			SUNXI_GPIO_AXP0_VBUS_DETECT);
150*4882a593Smuzhiyun 		name = lookup;
151*4882a593Smuzhiyun 	} else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
152*4882a593Smuzhiyun 		sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
153*4882a593Smuzhiyun 			SUNXI_GPIO_AXP0_VBUS_ENABLE);
154*4882a593Smuzhiyun 		name = lookup;
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun 	ret = gpio_lookup_name(name, NULL, NULL, &gpio);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	return ret ? ret : gpio;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
sunxi_gpio_direction_input(struct udevice * dev,unsigned offset)162*4882a593Smuzhiyun static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
sunxi_gpio_direction_output(struct udevice * dev,unsigned offset,int value)171*4882a593Smuzhiyun static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
172*4882a593Smuzhiyun 				       int value)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
175*4882a593Smuzhiyun 	u32 num = GPIO_NUM(offset);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
178*4882a593Smuzhiyun 	clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	return 0;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
sunxi_gpio_get_value(struct udevice * dev,unsigned offset)183*4882a593Smuzhiyun static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
186*4882a593Smuzhiyun 	u32 num = GPIO_NUM(offset);
187*4882a593Smuzhiyun 	unsigned dat;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	dat = readl(&plat->regs->dat);
190*4882a593Smuzhiyun 	dat >>= num;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	return dat & 0x1;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
sunxi_gpio_set_value(struct udevice * dev,unsigned offset,int value)195*4882a593Smuzhiyun static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
196*4882a593Smuzhiyun 				int value)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
199*4882a593Smuzhiyun 	u32 num = GPIO_NUM(offset);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
202*4882a593Smuzhiyun 	return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
sunxi_gpio_get_function(struct udevice * dev,unsigned offset)205*4882a593Smuzhiyun static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
208*4882a593Smuzhiyun 	int func;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	func = sunxi_gpio_get_cfgbank(plat->regs, offset);
211*4882a593Smuzhiyun 	if (func == SUNXI_GPIO_OUTPUT)
212*4882a593Smuzhiyun 		return GPIOF_OUTPUT;
213*4882a593Smuzhiyun 	else if (func == SUNXI_GPIO_INPUT)
214*4882a593Smuzhiyun 		return GPIOF_INPUT;
215*4882a593Smuzhiyun 	else
216*4882a593Smuzhiyun 		return GPIOF_FUNC;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun 
sunxi_gpio_xlate(struct udevice * dev,struct gpio_desc * desc,struct ofnode_phandle_args * args)219*4882a593Smuzhiyun static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
220*4882a593Smuzhiyun 			    struct ofnode_phandle_args *args)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun 	int ret;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	ret = device_get_child(dev, args->args[0], &desc->dev);
225*4882a593Smuzhiyun 	if (ret)
226*4882a593Smuzhiyun 		return ret;
227*4882a593Smuzhiyun 	desc->offset = args->args[1];
228*4882a593Smuzhiyun 	desc->flags = args->args[2] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return 0;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun static const struct dm_gpio_ops gpio_sunxi_ops = {
234*4882a593Smuzhiyun 	.direction_input	= sunxi_gpio_direction_input,
235*4882a593Smuzhiyun 	.direction_output	= sunxi_gpio_direction_output,
236*4882a593Smuzhiyun 	.get_value		= sunxi_gpio_get_value,
237*4882a593Smuzhiyun 	.set_value		= sunxi_gpio_set_value,
238*4882a593Smuzhiyun 	.get_function		= sunxi_gpio_get_function,
239*4882a593Smuzhiyun 	.xlate			= sunxi_gpio_xlate,
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun /**
243*4882a593Smuzhiyun  * Returns the name of a GPIO bank
244*4882a593Smuzhiyun  *
245*4882a593Smuzhiyun  * GPIO banks are named A, B, C, ...
246*4882a593Smuzhiyun  *
247*4882a593Smuzhiyun  * @bank:	Bank number (0, 1..n-1)
248*4882a593Smuzhiyun  * @return allocated string containing the name
249*4882a593Smuzhiyun  */
gpio_bank_name(int bank)250*4882a593Smuzhiyun static char *gpio_bank_name(int bank)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	char *name;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	name = malloc(3);
255*4882a593Smuzhiyun 	if (name) {
256*4882a593Smuzhiyun 		name[0] = 'P';
257*4882a593Smuzhiyun 		name[1] = 'A' + bank;
258*4882a593Smuzhiyun 		name[2] = '\0';
259*4882a593Smuzhiyun 	}
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	return name;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun 
gpio_sunxi_probe(struct udevice * dev)264*4882a593Smuzhiyun static int gpio_sunxi_probe(struct udevice *dev)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
267*4882a593Smuzhiyun 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	/* Tell the uclass how many GPIOs we have */
270*4882a593Smuzhiyun 	if (plat) {
271*4882a593Smuzhiyun 		uc_priv->gpio_count = plat->gpio_count;
272*4882a593Smuzhiyun 		uc_priv->bank_name = plat->bank_name;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	return 0;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun struct sunxi_gpio_soc_data {
279*4882a593Smuzhiyun 	int start;
280*4882a593Smuzhiyun 	int no_banks;
281*4882a593Smuzhiyun };
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun /**
284*4882a593Smuzhiyun  * We have a top-level GPIO device with no actual GPIOs. It has a child
285*4882a593Smuzhiyun  * device for each Sunxi bank.
286*4882a593Smuzhiyun  */
gpio_sunxi_bind(struct udevice * parent)287*4882a593Smuzhiyun static int gpio_sunxi_bind(struct udevice *parent)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct sunxi_gpio_soc_data *soc_data =
290*4882a593Smuzhiyun 		(struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
291*4882a593Smuzhiyun 	struct sunxi_gpio_platdata *plat = parent->platdata;
292*4882a593Smuzhiyun 	struct sunxi_gpio_reg *ctlr;
293*4882a593Smuzhiyun 	int bank, ret;
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* If this is a child device, there is nothing to do here */
296*4882a593Smuzhiyun 	if (plat)
297*4882a593Smuzhiyun 		return 0;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	ctlr = (struct sunxi_gpio_reg *)devfdt_get_addr(parent);
300*4882a593Smuzhiyun 	for (bank = 0; bank < soc_data->no_banks; bank++) {
301*4882a593Smuzhiyun 		struct sunxi_gpio_platdata *plat;
302*4882a593Smuzhiyun 		struct udevice *dev;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 		plat = calloc(1, sizeof(*plat));
305*4882a593Smuzhiyun 		if (!plat)
306*4882a593Smuzhiyun 			return -ENOMEM;
307*4882a593Smuzhiyun 		plat->regs = &ctlr->gpio_bank[bank];
308*4882a593Smuzhiyun 		plat->bank_name = gpio_bank_name(soc_data->start + bank);
309*4882a593Smuzhiyun 		plat->gpio_count = SUNXI_GPIOS_PER_BANK;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 		ret = device_bind(parent, parent->driver,
312*4882a593Smuzhiyun 					plat->bank_name, plat, -1, &dev);
313*4882a593Smuzhiyun 		if (ret)
314*4882a593Smuzhiyun 			return ret;
315*4882a593Smuzhiyun 		dev_set_of_offset(dev, dev_of_offset(parent));
316*4882a593Smuzhiyun 	}
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun static const struct sunxi_gpio_soc_data soc_data_a_all = {
322*4882a593Smuzhiyun 	.start = 0,
323*4882a593Smuzhiyun 	.no_banks = SUNXI_GPIO_BANKS,
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun static const struct sunxi_gpio_soc_data soc_data_l_1 = {
327*4882a593Smuzhiyun 	.start = 'L' - 'A',
328*4882a593Smuzhiyun 	.no_banks = 1,
329*4882a593Smuzhiyun };
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun static const struct sunxi_gpio_soc_data soc_data_l_2 = {
332*4882a593Smuzhiyun 	.start = 'L' - 'A',
333*4882a593Smuzhiyun 	.no_banks = 2,
334*4882a593Smuzhiyun };
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun static const struct sunxi_gpio_soc_data soc_data_l_3 = {
337*4882a593Smuzhiyun 	.start = 'L' - 'A',
338*4882a593Smuzhiyun 	.no_banks = 3,
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun #define ID(_compat_, _soc_data_) \
342*4882a593Smuzhiyun 	{ .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun static const struct udevice_id sunxi_gpio_ids[] = {
345*4882a593Smuzhiyun 	ID("allwinner,sun4i-a10-pinctrl",	a_all),
346*4882a593Smuzhiyun 	ID("allwinner,sun5i-a10s-pinctrl",	a_all),
347*4882a593Smuzhiyun 	ID("allwinner,sun5i-a13-pinctrl",	a_all),
348*4882a593Smuzhiyun 	ID("allwinner,sun6i-a31-pinctrl",	a_all),
349*4882a593Smuzhiyun 	ID("allwinner,sun6i-a31s-pinctrl",	a_all),
350*4882a593Smuzhiyun 	ID("allwinner,sun7i-a20-pinctrl",	a_all),
351*4882a593Smuzhiyun 	ID("allwinner,sun8i-a23-pinctrl",	a_all),
352*4882a593Smuzhiyun 	ID("allwinner,sun8i-a33-pinctrl",	a_all),
353*4882a593Smuzhiyun 	ID("allwinner,sun8i-a83t-pinctrl",	a_all),
354*4882a593Smuzhiyun 	ID("allwinner,sun8i-h3-pinctrl",	a_all),
355*4882a593Smuzhiyun 	ID("allwinner,sun8i-r40-pinctrl",	a_all),
356*4882a593Smuzhiyun 	ID("allwinner,sun9i-a80-pinctrl",	a_all),
357*4882a593Smuzhiyun 	ID("allwinner,sun6i-a31-r-pinctrl",	l_2),
358*4882a593Smuzhiyun 	ID("allwinner,sun8i-a23-r-pinctrl",	l_1),
359*4882a593Smuzhiyun 	ID("allwinner,sun8i-a83t-r-pinctrl",	l_1),
360*4882a593Smuzhiyun 	ID("allwinner,sun8i-h3-r-pinctrl",	l_1),
361*4882a593Smuzhiyun 	ID("allwinner,sun9i-a80-r-pinctrl",	l_3),
362*4882a593Smuzhiyun 	{ }
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun U_BOOT_DRIVER(gpio_sunxi) = {
366*4882a593Smuzhiyun 	.name	= "gpio_sunxi",
367*4882a593Smuzhiyun 	.id	= UCLASS_GPIO,
368*4882a593Smuzhiyun 	.ops	= &gpio_sunxi_ops,
369*4882a593Smuzhiyun 	.of_match = sunxi_gpio_ids,
370*4882a593Smuzhiyun 	.bind	= gpio_sunxi_bind,
371*4882a593Smuzhiyun 	.probe	= gpio_sunxi_probe,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun #endif
374