Home
last modified time | relevance | path

Searched hist:fe3fbd302427b3690c4d682c1d7d03ca94771afd (Results 1 – 4 of 4) sorted by relevance

/rk3399_rockchip-uboot/include/configs/
H A Dbayleybay.hfe3fbd302427b3690c4d682c1d7d03ca94771afd Thu Jul 30 10:49:18 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
/rk3399_rockchip-uboot/arch/x86/cpu/baytrail/
H A Dvalleyview.cfe3fbd302427b3690c4d682c1d7d03ca94771afd Thu Jul 30 10:49:18 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dbayleybay.dtsfe3fbd302427b3690c4d682c1d7d03ca94771afd Thu Jul 30 10:49:18 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
/rk3399_rockchip-uboot/configs/
H A Dbayleybay_defconfigfe3fbd302427b3690c4d682c1d7d03ca94771afd Thu Jul 30 10:49:18 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: bayleybay: Configure PCI IRQ

Add PCI IRQ routing information in the board device tree and enable
writing PIRQ routing table and MP table.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>