xref: /rk3399_rockchip-uboot/arch/x86/cpu/baytrail/valleyview.c (revision 07d778382200a05a8b86cc135f79ec48e386f25a)
13a1a18ffSSimon Glass /*
23a1a18ffSSimon Glass  * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
33a1a18ffSSimon Glass  *
43a1a18ffSSimon Glass  * SPDX-License-Identifier:	GPL-2.0+
53a1a18ffSSimon Glass  */
63a1a18ffSSimon Glass 
73a1a18ffSSimon Glass #include <common.h>
83a1a18ffSSimon Glass #include <mmc.h>
93a1a18ffSSimon Glass #include <pci_ids.h>
10fe3fbd30SBin Meng #include <asm/irq.h>
118b185041SBin Meng #include <asm/mrccache.h>
123a1a18ffSSimon Glass #include <asm/post.h>
133a1a18ffSSimon Glass 
14b4302582SSimon Glass #ifndef CONFIG_EFI_APP
arch_cpu_init(void)153a1a18ffSSimon Glass int arch_cpu_init(void)
163a1a18ffSSimon Glass {
173a1a18ffSSimon Glass 	post_code(POST_CPU_INIT);
183a1a18ffSSimon Glass 
19*0a8547a2SMasahiro Yamada 	return x86_cpu_init_f();
203a1a18ffSSimon Glass }
21fe3fbd30SBin Meng 
arch_misc_init(void)22fe3fbd30SBin Meng int arch_misc_init(void)
23fe3fbd30SBin Meng {
24c8896ee4SSimon Glass 	if (!ll_boot_init())
25c8896ee4SSimon Glass 		return 0;
2646f8efeeSSimon Glass 
278b185041SBin Meng #ifdef CONFIG_ENABLE_MRC_CACHE
288b185041SBin Meng 	/*
298b185041SBin Meng 	 * We intend not to check any return value here, as even MRC cache
308b185041SBin Meng 	 * is not saved successfully, it is not a severe error that will
318b185041SBin Meng 	 * prevent system from continuing to boot.
328b185041SBin Meng 	 */
338b185041SBin Meng 	mrccache_save();
348b185041SBin Meng #endif
358b185041SBin Meng 
3612d6929eSSimon Glass 	return 0;
37fe3fbd30SBin Meng }
388b185041SBin Meng 
39b4302582SSimon Glass #endif
4074e56d19SBin Meng 
reset_cpu(ulong addr)4174e56d19SBin Meng void reset_cpu(ulong addr)
4274e56d19SBin Meng {
4374e56d19SBin Meng 	/* cold reset */
4474e56d19SBin Meng 	x86_full_reset();
4574e56d19SBin Meng }
46