Searched hist:f8981277f581564bf701d310fe0f68903cf3f542 (Results 1 – 1 of 1) sorted by relevance
| /rk3399_rockchip-uboot/arch/mips/cpu/ |
| H A D | start.S | f8981277f581564bf701d310fe0f68903cf3f542 Wed Sep 21 10:18:51 UTC 2016 Paul Burton <paul.burton@imgtec.com> MIPS: If we don't need DDR for cache init, init cache first
On systems where cache initialisation doesn't require zeroed memory (ie.
systems where CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD is not defined)
perform cache initialisation prior to lowlevel_init & DDR
initialisation. This allows for DDR initialisation code to run cached &
thus significantly faster.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
|