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/rkbin/RKBOOT/
H A DRK3588MINIALL_PCIE_EP.inif02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
H A DRK3588MINIALL_RAMBOOT.inif02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
H A DRK3588MINIALL_IPC.inif02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
H A DRK3588MINIALL.inif02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
/rkbin/doc/release/
H A DRK3588_CN.mdf02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276
H A DRK3588_EN.mdf02d10e468d8c783c45137d230ff33d42ca670b4 Sun Feb 04 02:03:47 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276