Searched hist:ef1ebdc23034a804a72da2207f1a825ce96a1464 (Results 1 – 3 of 3) sorted by relevance
| /optee_os/core/arch/arm/plat-k3/ |
| H A D | conf.mk | ef1ebdc23034a804a72da2207f1a825ce96a1464 Tue Oct 01 05:00:11 UTC 2024 Vignesh Raghavendra <vigneshr@ti.com> plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint
system where DDR can be as small as 128M. Hence, move the DDR location
to the beginning of DDR right after TF-A.
Disable TI SCI, secure boot info and HW unique ID support for now, they
will be incrementally at later point in time as the underlying
communication layer is different than AM62x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
|
| H A D | main.c | ef1ebdc23034a804a72da2207f1a825ce96a1464 Tue Oct 01 05:00:11 UTC 2024 Vignesh Raghavendra <vigneshr@ti.com> plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint
system where DDR can be as small as 128M. Hence, move the DDR location
to the beginning of DDR right after TF-A.
Disable TI SCI, secure boot info and HW unique ID support for now, they
will be incrementally at later point in time as the underlying
communication layer is different than AM62x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
|
| /optee_os/.github/workflows/ |
| H A D | ci.yml | ef1ebdc23034a804a72da2207f1a825ce96a1464 Tue Oct 01 05:00:11 UTC 2024 Vignesh Raghavendra <vigneshr@ti.com> plat-k3: Add initial support for AM62Lx SoC
AM62Lx newest among on the K3 class of SoCs designed to be low footprint
system where DDR can be as small as 128M. Hence, move the DDR location
to the beginning of DDR right after TF-A.
Disable TI SCI, secure boot info and HW unique ID support for now, they
will be incrementally at later point in time as the underlying
communication layer is different than AM62x.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
|