Searched hist:e982746844605e5155fbd2e0ce13c3ecf7fafe48 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fdt.c | e982746844605e5155fbd2e0ce13c3ecf7fafe48 Thu Aug 29 07:40:38 UTC 2013 Prabhakar Kushwaha <prabhakar@freescale.com> powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2
CHASSIS2 architecture never defines type of L2 cache present in SoC.
it is dependent upon the core present in the SoC.
for example,
- e6500 core has L2 cluster (Kibo)
- e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
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| H A D | start.S | e982746844605e5155fbd2e0ce13c3ecf7fafe48 Thu Aug 29 07:40:38 UTC 2013 Prabhakar Kushwaha <prabhakar@freescale.com> powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2
CHASSIS2 architecture never defines type of L2 cache present in SoC.
it is dependent upon the core present in the SoC.
for example,
- e6500 core has L2 cluster (Kibo)
- e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
|
| H A D | cpu_init.c | e982746844605e5155fbd2e0ce13c3ecf7fafe48 Thu Aug 29 07:40:38 UTC 2013 Prabhakar Kushwaha <prabhakar@freescale.com> powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2
CHASSIS2 architecture never defines type of L2 cache present in SoC.
it is dependent upon the core present in the SoC.
for example,
- e6500 core has L2 cluster (Kibo)
- e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
|