Searched hist:e74d658181e5e69b6b5e16b40adc1ffef4c1efb9 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | wa_cve_2022_23960_bhb.S | e74d658181e5e69b6b5e16b40adc1ffef4c1efb9 Thu Oct 13 22:25:51 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): optimisations for CVE-2022-23960
Optimised the loop workaround for Spectre_BHB mitigation:
1. use of speculation barrier for cores implementing SB instruction.
2. use str/ldr instead of stp/ldp as the loop uses only X2 register.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I8ac53ea1e42407ad8004c1d59c05f791011f195d
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | asm_macros.S | e74d658181e5e69b6b5e16b40adc1ffef4c1efb9 Thu Oct 13 22:25:51 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(security): optimisations for CVE-2022-23960
Optimised the loop workaround for Spectre_BHB mitigation:
1. use of speculation barrier for cores implementing SB instruction.
2. use str/ldr instead of stp/ldp as the loop uses only X2 register.
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I8ac53ea1e42407ad8004c1d59c05f791011f195d
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