"defb184904c05df8ca49bd0265969ce72cb92401" (history) in projects: rk3399_rockchip-uboot

Searched hist:defb184904c05df8ca49bd0265969ce72cb92401 (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-aspeed/ast2500/
H A D	sdram_ast2500.c	`defb184904c05df8ca49bd0265969ce72cb92401 Mon Apr 17 19:00:33 UTC 2017 maxims@google.com <maxims@google.com> aspeed: Refactor SCU to use consistent mask & shift Refactor SCU header to use consistent Mask & Shift values. Now, consistently, to read value from SCU register, mask needs to be applied before shift. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>`
/rk3399_rockchip-uboot/drivers/clk/aspeed/
H A D	clk_ast2500.c	`defb184904c05df8ca49bd0265969ce72cb92401 Mon Apr 17 19:00:33 UTC 2017 maxims@google.com <maxims@google.com> aspeed: Refactor SCU to use consistent mask & shift Refactor SCU header to use consistent Mask & Shift values. Now, consistently, to read value from SCU register, mask needs to be applied before shift. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-aspeed/
H A D	scu_ast2500.h	`defb184904c05df8ca49bd0265969ce72cb92401 Mon Apr 17 19:00:33 UTC 2017 maxims@google.com <maxims@google.com> aspeed: Refactor SCU to use consistent mask & shift Refactor SCU header to use consistent Mask & Shift values. Now, consistently, to read value from SCU register, mask needs to be applied before shift. Signed-off-by: Maxim Sloyko <maxims@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>`