Searched hist:d5bd0de6275e0a00f8b5c0c5076180ecc21f8da6 (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_memctrl.c | d5bd0de6275e0a00f8b5c0c5076180ecc21f8da6 Mon Oct 30 21:35:17 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra: memctrl_v2: platform handler for TZDRAM settings
The Tegra memctrl driver sets up the TZDRAM fence during boot and
system suspend exit. This patch provides individual platforms with
handlers to perform platform specific steps, e.g. enable encryption,
save base/size to secure scratch registers.
Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/ |
| H A D | memctrl_v2.h | d5bd0de6275e0a00f8b5c0c5076180ecc21f8da6 Mon Oct 30 21:35:17 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra: memctrl_v2: platform handler for TZDRAM settings
The Tegra memctrl driver sets up the TZDRAM fence during boot and
system suspend exit. This patch provides individual platforms with
handlers to perform platform specific steps, e.g. enable encryption,
save base/size to secure scratch registers.
Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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