Searched hist:caee2733ba4e7a09ea656b0be85f150a275cc57c (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/plat/imx/imx8ulp/include/ |
| H A D | dram.h | caee2733ba4e7a09ea656b0be85f150a275cc57c Tue Jan 25 08:34:58 UTC 2022 Jacky Bai <ping.bai@nxp.com> feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
|
| /rk3399_ARM-atf/plat/imx/imx8ulp/ |
| H A D | dram.c | caee2733ba4e7a09ea656b0be85f150a275cc57c Tue Jan 25 08:34:58 UTC 2022 Jacky Bai <ping.bai@nxp.com> feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
|
| H A D | imx8ulp_bl31_setup.c | caee2733ba4e7a09ea656b0be85f150a275cc57c Tue Jan 25 08:34:58 UTC 2022 Jacky Bai <ping.bai@nxp.com> feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
|
| /rk3399_ARM-atf/plat/imx/common/include/ |
| H A D | imx_sip_svc.h | caee2733ba4e7a09ea656b0be85f150a275cc57c Tue Jan 25 08:34:58 UTC 2022 Jacky Bai <ping.bai@nxp.com> feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
|
| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx_sip_svc.c | caee2733ba4e7a09ea656b0be85f150a275cc57c Tue Jan 25 08:34:58 UTC 2022 Jacky Bai <ping.bai@nxp.com> feat(imx8ulp): enable the DDR frequency scaling support
Enable the DDR frequency scaling support on i.MX8ULP.
Normally, the freq_index define is as below:
0: boot frequency;
1: low frequency(PLL bypassed);
2. high frequency(PLL ON).
Currently, DDR DFS only do frequency switching between
Low freq and high freq.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: I3acd8bdf75e2dd6dff645b9f597dcfc0a756c428
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