Searched hist:c3b69bf17bc0231b0dae613dc9e1e01e41f32236 (Results 1 – 1 of 1) sorted by relevance
| /rk3399_ARM-atf/plat/xilinx/common/ |
| H A D | plat_fdt.c | c3b69bf17bc0231b0dae613dc9e1e01e41f32236 Tue Sep 05 10:26:44 UTC 2023 Michal Simek <michal.simek@amd.com> fix(xilinx): don't reserve 1 more byte
The commit f123b91fddfc ("fix(versal): fix BLXX memory
limits for user defined values") and commit a80da3899a5e
("fix(versal-net): fix BLXX memory limits for user defined
values") fixed issue regarding linker alignment section.
But removing -1 logic is not reflected in plat_fdt() memory
reservation code.
That's why remove +1 from prepare_dtb() not to generate a reserved
memory node with bigger size which ends up with reserving more
space than actually requested by a full featured bootloader or OS.
Change-Id: I0a646cee7d5a55157a6eb1b672c2edbe89e6a57f
Signed-off-by: Michal Simek <michal.simek@amd.com>
|