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/rk3399_rockchip-uboot/arch/arm/cpu/arm720t/
H A Dinterrupts.cc037c93bf925224b7f4da8958ae14e58c0b3c8bb Fri Aug 31 08:30:09 UTC 2012 Allen Martin <amartin@nvidia.com> ARM: add tegra20 support to arm720t

Add support for tegra20 arm7 boot processor. This processor is used
to power on the Cortex A9 and transfer control to it. In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical except for cache and MMU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
H A Dcpu.cc037c93bf925224b7f4da8958ae14e58c0b3c8bb Fri Aug 31 08:30:09 UTC 2012 Allen Martin <amartin@nvidia.com> ARM: add tegra20 support to arm720t

Add support for tegra20 arm7 boot processor. This processor is used
to power on the Cortex A9 and transfer control to it. In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical except for cache and MMU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
H A Dstart.Sc037c93bf925224b7f4da8958ae14e58c0b3c8bb Fri Aug 31 08:30:09 UTC 2012 Allen Martin <amartin@nvidia.com> ARM: add tegra20 support to arm720t

Add support for tegra20 arm7 boot processor. This processor is used
to power on the Cortex A9 and transfer control to it. In tegra this
processor is an ARM7TDMI not an ARM720T, but since we don't use cache
it was easier to just reuse the ARM720T code as the processors are
otherwise identical except for cache and MMU.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>