184ad6884SPeter Tyser/* 284ad6884SPeter Tyser * armboot - Startup Code for ARM720 CPU-core 384ad6884SPeter Tyser * 4fa82f871SAlbert ARIBAUD * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 5fa82f871SAlbert ARIBAUD * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 684ad6884SPeter Tyser * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 884ad6884SPeter Tyser */ 984ad6884SPeter Tyser 1025ddd1fbSWolfgang Denk#include <asm-offsets.h> 1184ad6884SPeter Tyser#include <config.h> 1284ad6884SPeter Tyser 1384ad6884SPeter Tyser/* 1484ad6884SPeter Tyser ************************************************************************* 1584ad6884SPeter Tyser * 1684ad6884SPeter Tyser * Startup Code (reset vector) 1784ad6884SPeter Tyser * 1884ad6884SPeter Tyser * do important init only if we don't start from RAM! 1984ad6884SPeter Tyser * relocate armboot to ram 2084ad6884SPeter Tyser * setup stack 2184ad6884SPeter Tyser * jump to second stage 2284ad6884SPeter Tyser * 2384ad6884SPeter Tyser ************************************************************************* 2484ad6884SPeter Tyser */ 2584ad6884SPeter Tyser 2641623c91SAlbert ARIBAUD .globl reset 27abef7b85SHeiko Schocher 28abef7b85SHeiko Schocherreset: 29abef7b85SHeiko Schocher /* 30abef7b85SHeiko Schocher * set the cpu to SVC32 mode 31abef7b85SHeiko Schocher */ 32abef7b85SHeiko Schocher mrs r0,cpsr 33abef7b85SHeiko Schocher bic r0,r0,#0x1f 34abef7b85SHeiko Schocher orr r0,r0,#0xd3 35abef7b85SHeiko Schocher msr cpsr,r0 36abef7b85SHeiko Schocher 37abef7b85SHeiko Schocher /* 38abef7b85SHeiko Schocher * we do sys-critical inits only at reboot, 39abef7b85SHeiko Schocher * not when booting from ram! 40abef7b85SHeiko Schocher */ 41*1c2d2727SSimon Glass#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \ 42*1c2d2727SSimon Glass !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY) 43abef7b85SHeiko Schocher bl cpu_init_crit 44abef7b85SHeiko Schocher#endif 45abef7b85SHeiko Schocher 46e05e5de7SAlbert ARIBAUD bl _main 47abef7b85SHeiko Schocher 48abef7b85SHeiko Schocher/*------------------------------------------------------------------------------*/ 49abef7b85SHeiko Schocher 50e05e5de7SAlbert ARIBAUD .globl c_runtime_cpu_setup 51e05e5de7SAlbert ARIBAUDc_runtime_cpu_setup: 52e05e5de7SAlbert ARIBAUD 53e05e5de7SAlbert ARIBAUD mov pc, lr 54e05e5de7SAlbert ARIBAUD 5584ad6884SPeter Tyser/* 5684ad6884SPeter Tyser ************************************************************************* 5784ad6884SPeter Tyser * 5884ad6884SPeter Tyser * CPU_init_critical registers 5984ad6884SPeter Tyser * 6084ad6884SPeter Tyser * setup important registers 6184ad6884SPeter Tyser * setup memory timing 6284ad6884SPeter Tyser * 6384ad6884SPeter Tyser ************************************************************************* 6484ad6884SPeter Tyser */ 6584ad6884SPeter Tyser 66*1c2d2727SSimon Glass#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && \ 67*1c2d2727SSimon Glass !defined(CONFIG_SKIP_LOWLEVEL_INIT_ONLY) 6884ad6884SPeter Tysercpu_init_crit: 6984ad6884SPeter Tyser 7084ad6884SPeter Tyser mov ip, lr 7184ad6884SPeter Tyser /* 7284ad6884SPeter Tyser * before relocating, we have to setup RAM timing 7384ad6884SPeter Tyser * because memory timing is board-dependent, you will 7484ad6884SPeter Tyser * find a lowlevel_init.S in your board directory. 7584ad6884SPeter Tyser */ 7684ad6884SPeter Tyser bl lowlevel_init 7784ad6884SPeter Tyser mov lr, ip 7884ad6884SPeter Tyser 7984ad6884SPeter Tyser mov pc, lr 80578e6378SAxel Lin#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 81