Searched hist:c02d94aba0d42212bf343785f080f1fc1085f947 (Results 1 – 2 of 2) sorted by relevance
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| H A D | RK3288MINIALL.ini | c02d94aba0d42212bf343785f080f1fc1085f947 Thu May 23 10:34:05 UTC 2019 CanYang He <hcy@rock-chips.com> rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.08
built from ddr init project commit:
79d5673 version: DDR Version 1.08 20190523
update feature:
b5065df rk3288: ddr: enable 2T mode
f92a1c0 rk3288: ddr: support bus-width=16bit with row=16
88fab8f rk32: ddr: fix bug of idle port fail
579f3c0 rk32: ddr: fix wrong uart base address for atags
Change-Id: I23791bb0a58bdbb718bd77d62b383eea91418e1d
Signed-off-by: CanYang He <hcy@rock-chips.com>
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| H A D | RK3288.ini | c02d94aba0d42212bf343785f080f1fc1085f947 Thu May 23 10:34:05 UTC 2019 CanYang He <hcy@rock-chips.com> rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.08
built from ddr init project commit:
79d5673 version: DDR Version 1.08 20190523
update feature:
b5065df rk3288: ddr: enable 2T mode
f92a1c0 rk3288: ddr: support bus-width=16bit with row=16
88fab8f rk32: ddr: fix bug of idle port fail
579f3c0 rk32: ddr: fix wrong uart base address for atags
Change-Id: I23791bb0a58bdbb718bd77d62b383eea91418e1d
Signed-off-by: CanYang He <hcy@rock-chips.com>
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