rk3288: ddr: update ddr bin to DDR 20240527 fwver: v1.12

build in:
c9991c2 rk3288: update DDR 20240527 fwver: v1.12

update feature:
30829bb rk3288: ddr fix 194MHz DQ/DQS phase not suitable
10b27

rk3288: ddr: update ddr bin to DDR 20240527 fwver: v1.12

build in:
c9991c2 rk3288: update DDR 20240527 fwver: v1.12

update feature:
30829bb rk3288: ddr fix 194MHz DQ/DQS phase not suitable
10b27fc project: move project to Arm Development Studio IDE

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0c5b8fe4f77a1568c2672a053e2ab1702bf56076

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RKBOOT/RKTRUST/bin: Set file mode 644

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I3fa512e2cfa636800ef15907c53aae24cd599967

rk3288: ddr: update ddr bin to Version 1.11 20210818

built from ddr init project commit:
d16ca90 version: DDR Version 1.11 20210818
update feature:
242c324 rk3288: ddr: add reseved for ddrbin tool

rk3288: ddr: update ddr bin to Version 1.11 20210818

built from ddr init project commit:
d16ca90 version: DDR Version 1.11 20210818
update feature:
242c324 rk3288: ddr: add reseved for ddrbin tool

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I67839c87bbb6b4a316ca5bf5f82de94e9187bf78

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rk3288: ddr: update ddr bin to Version 1.10 20210817

built from ddr init project commit:
eec2e9b version: DDR Version 1.10 20210817

update feature:
002cfa9 rk3288: ddr: add uart4 support

Signed-

rk3288: ddr: update ddr bin to Version 1.10 20210817

built from ddr init project commit:
eec2e9b version: DDR Version 1.10 20210817

update feature:
002cfa9 rk3288: ddr: add uart4 support

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I61b722b2fc555017aa0d25bcbaaba49a39ec5184

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rk3288: loader: do not config nand1 iomux while using emmc

Build from rk_boot_all commit:
eb17f16181: rk3288: do not config nand1 iomux while using emmc

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock

rk3288: loader: do not config nand1 iomux while using emmc

Build from rk_boot_all commit:
eb17f16181: rk3288: do not config nand1 iomux while using emmc

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ib1da65a92aa4b2150c960e3d2690fe7e3bb3a320

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rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.09

built from ddr init project commit:
338a11e version: DDR Version 1.09 20201119
update feature:
d8f0436 rk3288: ddr: add g_2t_info to control

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.09

built from ddr init project commit:
338a11e version: DDR Version 1.09 20201119
update feature:
d8f0436 rk3288: ddr: add g_2t_info to control 2T

Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: If5a2655e1d5ed5688d98d873034a6d855a7e1ee3

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rk3288: loader: update miniloader bin to v2.58

build from:
8a4c72 Add A/B boot support
update feature:
Add A/B boot support.

Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Change-Id: Ied734691f

rk3288: loader: update miniloader bin to v2.58

build from:
8a4c72 Add A/B boot support
update feature:
Add A/B boot support.

Signed-off-by: Chen Fen <chenfen@rock-chips.com>
Change-Id: Ied734691f09444ab3b2b795a36586ed10a613ce0

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rk3288: loader: enable secure boot if loader sign.

from commit: 0dd6485 enable secure boot if loader sign.

Change-Id: Ib179260cde42bd1c5bb22404235315602509bba2
Signed-off-by: chenfen <chenfen@rock-

rk3288: loader: enable secure boot if loader sign.

from commit: 0dd6485 enable secure boot if loader sign.

Change-Id: Ib179260cde42bd1c5bb22404235315602509bba2
Signed-off-by: chenfen <chenfen@rock-chips.com>

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RKBOOT: remove prefix path "tools/rk_tools/"

This is a prefix path from legacy rkdevelop U-Boot, we remove
it since there is not such path in rkbin project.

Change-Id: I17337389ced3feb104637825fc12

RKBOOT: remove prefix path "tools/rk_tools/"

This is a prefix path from legacy rkdevelop U-Boot, we remove
it since there is not such path in rkbin project.

Change-Id: I17337389ced3feb104637825fc12496c15ac6f0e
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.08

built from ddr init project commit:
79d5673 version: DDR Version 1.08 20190523
update feature:
b5065df rk3288: ddr: enable 2T mode
f92a1c0 r

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.08

built from ddr init project commit:
79d5673 version: DDR Version 1.08 20190523
update feature:
b5065df rk3288: ddr: enable 2T mode
f92a1c0 rk3288: ddr: support bus-width=16bit with row=16
88fab8f rk32: ddr: fix bug of idle port fail
579f3c0 rk32: ddr: fix wrong uart base address for atags

Change-Id: I23791bb0a58bdbb718bd77d62b383eea91418e1d
Signed-off-by: CanYang He <hcy@rock-chips.com>

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rk3288: loader: add rk atags.

from commit: e189ed0 add rk atags.

Change-Id: I841af394f061982ea12cadc3b8a6d1e5b795ef12
Signed-off-by: Fen Chen <chenfen@rock-chips.com>

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.07

built from ddr init project commit:
ebd89a6 version: DDR Version 1.07 20190329
update feature:
7b0f07c rk32: ddr: add atags support
f8ec0a8

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.07

built from ddr init project commit:
ebd89a6 version: DDR Version 1.07 20190329
update feature:
7b0f07c rk32: ddr: add atags support
f8ec0a8 rk32: ddr: using unify global argument for uart, dram info config

Change-Id: Icfbeeb7f271f8654d4785047c4abbe2679014d70
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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rk3288: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3288 usbplug support upgrade by LBA.

Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chip

rk3288: usbplug: support upgrade by LBA.

from commit: ca6111834 rk3288 usbplug support upgrade by LBA.

Change-Id: I5b3bccfdcd58b92bfc9016deee6d4c6e23a8bde3
Signed-off-by: chenfen <chenfen@rock-chips.com>

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Merge branch 'rkbin' into rkbin_master

rockchip: miniloader: fix emmc trim function offset address bug.

include rk3399,rk3368,rk3328,rk3228,rk3288.

from commit: 3504f80 fix: emmc trim bug.

Change-Id: I19a70a3e3be053036c14cf99d97fd9dee8

rockchip: miniloader: fix emmc trim function offset address bug.

include rk3399,rk3368,rk3328,rk3228,rk3288.

from commit: 3504f80 fix: emmc trim bug.

Change-Id: I19a70a3e3be053036c14cf99d97fd9dee88bee88
Signed-off-by: chenfen <chenfen@rock-chips.com>

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Merge branch 'rkbin_171212' into rkbin

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.06

built from ddr init project commit:
7c2ce8c version: release version of v1.06

update feature:
1) all ddr3 use 16bit, it can fix hynix DDR3 H5

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.06

built from ddr init project commit:
7c2ce8c version: release version of v1.06

update feature:
1) all ddr3 use 16bit, it can fix hynix DDR3 H5TC4G63CFR die's
starting up problem, and system stabilize problem.

Change-Id: I61d3410d12b7e924b2cb24cd28a2101fbaf7d49b
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.05

built from ddr init project commit:
49df872 version: DDR Version 1.05 20170712

update feature:
1) fix customer DDR3 3GB with
channel a: co

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.05

built from ddr init project commit:
49df872 version: DDR Version 1.05 20170712

update feature:
1) fix customer DDR3 3GB with
channel a: col=10, row=16, cs=1, size = 2048MB
channel b: col=10, row=15, cs=1, size = 1024MB
2) support all 3GB and 1.5GB setting with DDR3
512Mx16bit and LPDDR3 single die with 8Gb case.
these rarely type of die was not consider before.

Change-Id: Ibdb5d758cc622a72672faff7069bd5efa85ce2e4
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.04

built from ddr init project commit:
996e7c3 version: DDR Version 1.04 20170614

update feature:
1) add qos prority set in ddr init code

Chan

rk3288: ddr: update ddr bin to rk3288_ddr_400MHz_v1.04

built from ddr init project commit:
996e7c3 version: DDR Version 1.04 20170614

update feature:
1) add qos prority set in ddr init code

Change-Id: I55c443dc120b0dc2c59296fd274b5e9ee47f14ab
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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rk3036 rk3126 rk3128 rk3228 rk3288 rk3368 rk3328:miniloader: add emmc trim function

Change-Id: If8b9e9187b0b55da30eed4f7be8b02d75cd83f40
Signed-off-by: chenfen <chenfen@rock-chips.com>

rk3288: ddr: rk3288_ddr_400MHz_v1.03

add a timer_init() call in ddr init code

Change-Id: Ieb1cedaf86ea630269c4f31de2642abfa608f71c
Signed-off-by: Hecanyang <hcy@rock-chips.com>
Signed-off-by: Jianq

rk3288: ddr: rk3288_ddr_400MHz_v1.03

add a timer_init() call in ddr init code

Change-Id: Ieb1cedaf86ea630269c4f31de2642abfa608f71c
Signed-off-by: Hecanyang <hcy@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

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rk_tool: rk32: update binary names

Use rk3288 instead of rk32xx because there no other chip share
this name.
Re-name ddr bin for rk3288.

Change-Id: I501b63162b67c7db445dc56d06f93be93445ff1d
Signed-

rk_tool: rk32: update binary names

Use rk3288 instead of rk32xx because there no other chip share
this name.
Re-name ddr bin for rk3288.

Change-Id: I501b63162b67c7db445dc56d06f93be93445ff1d
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rk3288: update miniloader to v2.32

1. support load trust.
2. init timer7 for u-boot

Change-Id: I6009dae11823c6e4c1d5cd1eeae7ff72279c6b67
Signed-off-by: William Zhang <william.zhang@rock-chips.com>

RKBOOT/RKTRUST: rename the bin and ini files in rk_tools to a standard

1. Files to be merged in rk_tools should rename as format:
[chip]_[module]_[feature]_[version].[postfix]
such as "rk

RKBOOT/RKTRUST: rename the bin and ini files in rk_tools to a standard

1. Files to be merged in rk_tools should rename as format:
[chip]_[module]_[feature]_[version].[postfix]
such as "rk322xh_ddr3_800MHz_v1.00.bin"
2. Output two-level loader, format such as "rk322xh_loader_v1.00.238.bin",
v1.00.238 means its ddr version is v1.06, and miniloader version is v2.38.
3. As for output one-level loader, format such as "rk3288_bootloader_v1.01.bin",
v1.01 means its ddr version is v1.01.

Change-Id: Ia492b9c76e2396ff246585d5fbbb34c248b55044
Signed-off-by: William Zhang <william.zhang@rock-chips.com>

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RK3288: DDR: DDR Version 1.01 20160803

All DRAM type init frequency increase to 400MHz,
because some type of screen display gilitter before
kernel set DDR rate to high frequency.

Change-Id: I519b60

RK3288: DDR: DDR Version 1.01 20160803

All DRAM type init frequency increase to 400MHz,
because some type of screen display gilitter before
kernel set DDR rate to high frequency.

Change-Id: I519b606db92e10ae6807efecf361fe2379cbf28d
Signed-off-by: Hecanyang <hcy@rock-chips.com>

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