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H A Dspl.cbd65fe35fffd9a9e8c8abe5321a51a8c43eda97d Thu Jul 09 03:21:02 UTC 2015 Marek Vasut <marex@denx.de> arm: socfpga: spl: Add missing reset logic

Make sure that all the peripherals are correctly reset and then
brought out of reset in the SPL. Not going through proper reset
cycle might leave the IP blocks in inconsistent state.

Signed-off-by: Marek Vasut <marex@denx.de>