Searched hist:bc6bbd6be85973359e89f53e3bfbba2a3549da09 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init_early.c | bc6bbd6be85973359e89f53e3bfbba2a3549da09 Thu Jul 07 15:06:47 UTC 2011 Poonam Aggrwal <poonam.aggrwal@freescale.com> fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
Issue: Address masking doesn't work properly.
When sum of the base address, defined by BA, and memory bank size,
defined by AM, exceeds 4GB (0xffff_ffff) then AMASKn[AM] doesn't mask
CSPRn[BA] bits.
Impact:
This will impact booting when we are reprogramming CSPR0(BA) and
AMASK0(AMASK) while executing from NOR Flash.
Workaround:
Re-programming of CSPR(BA) and AMASK is done while not executing from NOR
Flash. The code which programs the BA and AMASK is executed from L2-SRAM.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| H A D | cmd_errata.c | bc6bbd6be85973359e89f53e3bfbba2a3549da09 Thu Jul 07 15:06:47 UTC 2011 Poonam Aggrwal <poonam.aggrwal@freescale.com> fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
Issue: Address masking doesn't work properly.
When sum of the base address, defined by BA, and memory bank size,
defined by AM, exceeds 4GB (0xffff_ffff) then AMASKn[AM] doesn't mask
CSPRn[BA] bits.
Impact:
This will impact booting when we are reprogramming CSPR0(BA) and
AMASK0(AMASK) while executing from NOR Flash.
Workaround:
Re-programming of CSPR(BA) and AMASK is done while not executing from NOR
Flash. The code which programs the BA and AMASK is executed from L2-SRAM.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | config_mpc85xx.h | bc6bbd6be85973359e89f53e3bfbba2a3549da09 Thu Jul 07 15:06:47 UTC 2011 Poonam Aggrwal <poonam.aggrwal@freescale.com> fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
Issue: Address masking doesn't work properly.
When sum of the base address, defined by BA, and memory bank size,
defined by AM, exceeds 4GB (0xffff_ffff) then AMASKn[AM] doesn't mask
CSPRn[BA] bits.
Impact:
This will impact booting when we are reprogramming CSPR0(BA) and
AMASK0(AMASK) while executing from NOR Flash.
Workaround:
Re-programming of CSPR(BA) and AMASK is done while not executing from NOR
Flash. The code which programs the BA and AMASK is executed from L2-SRAM.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|