Searched hist:b10afcce5ff1202e1cd922dbd3c1e5980b478429 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a78.S | b10afcce5ff1202e1cd922dbd3c1e5980b478429 Thu Dec 15 20:48:21 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78 erratum 2772019
Cortex-A78 erratum 2772019 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1401784/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0362da463eca777aa7a385bcdeb39b8549799f02
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | b10afcce5ff1202e1cd922dbd3c1e5980b478429 Thu Dec 15 20:48:21 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78 erratum 2772019
Cortex-A78 erratum 2772019 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1401784/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0362da463eca777aa7a385bcdeb39b8549799f02
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | b10afcce5ff1202e1cd922dbd3c1e5980b478429 Thu Dec 15 20:48:21 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78 erratum 2772019
Cortex-A78 erratum 2772019 is a Cat B erratum that applies to
all revisions <=r1p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1401784/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0362da463eca777aa7a385bcdeb39b8549799f02
|